Detailed Description

Each DS3992 channel drives two logic-level n-channel

MOSFETs that are connected between the ends of

a step-up transformer and ground (See the

Typical

Operating Circuits). The transformer has a center tap

on the primary side that is connected to the DC inverter

voltage supply. The DS3992 alternately turns on the two

MOSFETs to create the high-voltage AC waveform on

the secondary side. By varying the duration of the

MOSFET turn-on times, the DS3992 is able to accurate-

ly control the CCFL current.

A resistor in series with the CCFL’s ground connection

enables current monitoring. The voltage across this

resistor is fed to the lamp current monitor (LCM) input

and compared to an internal reference voltage to deter-

mine the duty cycle for the MOSFET gates.

The DS3992 supports a 1 lamp per channel configura-

tion with fully independent lamp control and minimal

external components. The DS3992 is also capable of

controlling more than 1 lamp per channel using a

wired-OR feedback circuit. See the

Typical Operating

Circuits section for more information.

Block diagrams of the DS3992 are shown in Figures 1

and 2. More operating details of the DS3992 are dis-

cussed on the following pages of this data sheet.

Dimming Control

The DS3992 uses “burst” dimming to control the lamp

brightness. An analog voltage applied at the BRIGHT

input pin determines the duty cycle of a digital pulse-

width-modulated (DPWM) signal (90Hz to 220Hz for

DS3992Z-09P/DS3992Z-09N and 180Hz to 440Hz for

DS3992Z-18P/DS3992Z-18N). During the high period of

the DPWM cycle, the lamp is driven at the selected

lamp frequency (40kHz to 80kHz) as shown in Figure 3.

This part of the cycle is also called the “burst” period

because of the lamp frequency burst that occurs

Two-Channel, Push-Pull CCFL Controller

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7

Functional Diagrams (continued)

GATE

DRIVERS

GAn

GBn

DIGITAL

CCFL

CONTROLLER

CHANNEL FAULT

512 x LAMP FREQUENCY

[20.48MHz TO 40.96MHz]

LAMP FREQUENCY

[40kHz TO 80kHz]

DIMMING PWM SIGNAL

CHANNEL ENABLE

MOSFET

GATE

DRIVERS

LCMn

LAMP CURRENT MONITOR

400mV

2.0V

LAMP OVERCURRENT

LAMP STRIKE AND REGULATION

LAMP OUT

1.0V

1.0V

OVDn

OVERVOLTAGE DETECTOR

LAMP MAXIMUM VOLTAGE REGULATION

64 LAMP CYCLE

INTEGRATOR

OVERVOLTAGE

Figure 2. DS3992 Per Channel Logic Diagram

90Hz TO 220Hz

OR

180Hz TO 440Hz

LAMP CURRENT

DPWM SIGNAL

Figure 3. Digital-PWM Dimming and Soft-Start