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S29WS128N0PBFW113 Datasheet(PDF) 2 Page - SPANSION

Part # S29WS128N0PBFW113
Description  256/128/64 Megabit (16/8/4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
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S29WS128N0PBFW113 Datasheet(HTML) 2 Page - SPANSION

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S29WSxxxN MirrorBit™ Flash Family
S29WSxxxN_00F0 October 29, 2004
Pr e l i m i n a r y
Table of Contents
1. Ordering Information . . . . . . . . . . . . . . . . . . . . . .5
2. Input/Output Descriptions & Logic Symbol . . . .6
3. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4. Physical Dimensions/Connection Diagrams . . . .8
4.1 Related Documents ........................................................................ 8
4.2 Special Handling Instructions for FBGA Package ................. 8
4.3 MCP Look-ahead Connection Diagram ................................. 13
5. Additional Resources . . . . . . . . . . . . . . . . . . . . . 15
6. Product Overview . . . . . . . . . . . . . . . . . . . . . . . . 16
6.1 Memory Map .................................................................................... 16
7. Device Operations . . . . . . . . . . . . . . . . . . . . . . . 19
7.1 Device Operation Table ............................................................... 19
7.2 Asynchronous Read ...................................................................... 19
7.3 Synchronous (Burst) Read Mode &
Configuration Register ........................................................................20
7.3.1 Continuous Burst Read Mode .......................................... 24
7.3.2 8-, 16-, 32-Word Linear Burst Read
with Wrap Around ....................................................................... 25
7.3.3 8-, 16-, 32-Word Linear Burst
without Wrap Around ................................................................ 25
7.3.4 Configuration Register ....................................................... 25
7.4 Autoselect ....................................................................................... 26
7.5 Program/Erase Operations ........................................................ 29
7.5.1. Single Word Programming ................................................ 29
7.5.2 Write Buffer Programming ................................................ 31
7.5.3 Sector Erase ........................................................................... 34
7.5.4 Chip Erase Command Sequence ..................................... 38
7.5.5 Erase Suspend/Erase Resume Commands ................... 38
7.5.6 Program Suspend/Program Resume Commands ....... 39
7.5.7 Accelerated Program/Chip Erase ...................................40
7.5.8 Unlock Bypass ........................................................................ 41
7.5.9 Write Operation Status ..................................................... 42
7.6 Simultaneous Read/Write ..........................................................48
7.7 Writing Commands/Command Sequences ..........................48
7.8 Handshaking ...................................................................................48
7.9 Hardware Reset ............................................................................ 49
7.10 Software Reset ............................................................................. 49
8. Advanced Sector Protection/Unprotection . . . 51
8.1 Lock Register .................................................................................. 52
8.2 Persistent Protection Bits .......................................................... 52
8.3 Dynamic Protection Bits .............................................................53
8.4 Persistent Protection Bit Lock Bit ...........................................53
8.5 Password Protection Method ...................................................54
8.6 Advanced Sector Protection Software Examples ...............56
8.7 Hardware Data Protection Methods ......................................56
8.7.1. WP# Method .........................................................................56
8.7.2 ACC Method .........................................................................56
8.7.3 Low VCC Write Inhibit .......................................................57
8.7.4 Write Pulse “Glitch Protection” .....................................57
8.7.5 Power-Up Write Inhibit .....................................................57
9. Power Conservation Modes . . . . . . . . . . . . . . . 58
9.1 Standby Mode ................................................................................. 58
9.2 Automatic Sleep Mode ............................................................... 58
9.3 Hardware RESET# Input Operation ...................................... 58
9.4 Output Disable (OE#) ................................................................ 58
10. SecSiTM (Secured Silicon) Sector Flash Memory
Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
10.1 Factory SecSiTM Sector .................................................................59
10.2 Customer SecSiTM Sector .......................................................... 60
10.3 SecSiTM Sector Entry and SecSi Sector Exit
Command Sequences .......................................................................... 60
11. Electrical Specifications . . . . . . . . . . . . . . . . . . 62
11.1 Absolute Maximum Ratings ....................................................... 62
11.2 Operating Ranges ..........................................................................63
11.3 Test Conditions .............................................................................63
11.4 Key to Switching Waveforms ................................................. 64
11.5 Switching Waveforms ................................................................. 64
11.6 VCC Power-up .............................................................................. 64
11.7 DC Characteristics (CMOS Compatible) .............................65
11.8 AC Characteristics ...................................................................... 66
11.8.1. CLK Characterization ....................................................... 66
11.8.2 Synchronous/Burst Read ...................................................67
11.8.3 Timing Diagrams ................................................................. 68
11.8.4 AC Characteristics—Asynchronous Read ................. 70
11.8.5 Hardware Reset (RESET#) ..............................................72
11.8.6 Erase/Program Timing ........................................................73
11.8.7 Erase and Programming Performance ...........................83
11.8.8 BGA Ball Capacitance ....................................................... 84
12. Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
12.1 Common Flash Memory Interface ..........................................88
13. Commonly Used Terms . . . . . . . . . . . . . . . . . . 92
14. Revisions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95


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