7

HLX6256

ADDRESS

HIGH

IMPEDANCE

DATA OUT

NWE

DATA IN

DATA VALID

NCS

CE

WRITE CYCLE AC TIMING CHARACTERISTICS (1)

Symbol

Parameter

Typical

-55 to 125

Units

(2)

Min

Max

Worst Case (3)

TAVAVW

25

ns

TWLWH

Write Enable Write Pulse Width

20

ns

TSLWH

Chip Select to End of Write Time

20

ns

TDVWH

Data Valid to End of Write Time

15

ns

TAVWH

Address Valid to End of Write Time

20

ns

TWHDX

Data Hold Time after End of Write Time

0

ns

TAVWL

Address Valid Setup to Start of Write Time

0

ns

TWHAX

Address Valid Hold after End of Write Time

0

ns

TWLQZ

Write Enable to Output Disable Time

12.6

ns

TWHQX

Write Disable to Output Enable Time

5

ns

TWHWL

Write Disable to Write Enable Pulse Width (5)

5

ns

TEHWH

Chip Enable to End of Write Time (6)

20

ns

(1) Test conditions: input switching levels, VIL/VIH=0V/3V, input rise and fall times <1 ns/V, input and output timing reference levels shown in the

Tester AC Timing Characteristics table, capacitive output loading >50 pF, or equivalent capacitive load of 5 pF for TWLQZ.

(2) Typical operating conditions: VDD=3.3 V, TA=25

°C, pre-radiation.

(3) Worst case operating conditions: VDD=3.0 V to 3.6 V, -55 to 125

°C, post total dose at 25°C.

(4) TAVAVW = TWLWH + TWHWL

(5) Guaranteed but not tested.

(6) Chip Enable (CE) pin not available on 28-lead FP or DIP.