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DS2156 Datasheet(PDF) 2 Page - Maxim Integrated Products

Part # DS2156
Description  T1/E1/J1 Single-Chip Transceiver
Download  240 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS2156 Datasheet(HTML) 2 Page - Maxim Integrated Products

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1. TABLE OF CONTENTS
1. TABLE OF CONTENTS..................................................................................................................................2
1.1
TABLE OF FIGURES ........................................................................................................................................6
1.2
TABLE OF TABLES..........................................................................................................................................7
2. DATA SHEET REVISION HISTORY ...........................................................................................................8
3. MAIN FEATURES .........................................................................................................................................10
3.1
FUNCTIONAL DESCRIPTION .........................................................................................................................13
3.2
BLOCK DIAGRAM.........................................................................................................................................15
4. PIN FUNCTION DESCRIPTION .................................................................................................................19
4.1
TRANSMIT SIDE ...........................................................................................................................................19
4.2
RECEIVE SIDE ..............................................................................................................................................22
4.3
PARALLEL CONTROL PORT PINS .................................................................................................................26
4.4
EXTENDED SYSTEM INFORMATION BUS......................................................................................................27
4.5
USER OUTPUT PORT PINS ............................................................................................................................28
4.6
JTAG TEST ACCESS PORT PINS...................................................................................................................29
4.7
LINE INTERFACE PINS..................................................................................................................................30
4.8
SUPPLY PINS ................................................................................................................................................31
4.9
L AND G PACKAGE PINOUT.........................................................................................................................32
4.10
10MM CSBGA PIN CONFIGURATION ......................................................................................................34
5. PARALLEL PORT .........................................................................................................................................35
5.1
REGISTER MAP ............................................................................................................................................35
6. PROGRAMMING MODEL ..........................................................................................................................41
6.1
POWER-UP SEQUENCE.................................................................................................................................42
6.1.1
Master Mode Register.........................................................................................................................42
6.2
INTERRUPT HANDLING ................................................................................................................................43
6.3
STATUS REGISTERS......................................................................................................................................43
6.4
INFORMATION REGISTERS ...........................................................................................................................44
6.5
INTERRUPT INFORMATION REGISTERS ........................................................................................................44
7. SPECIAL PER-CHANNEL REGISTER OPERATION.............................................................................45
8. CLOCK MAP ..................................................................................................................................................47
9. T1 FRAMER/FORMATTER CONTROL AND STATUS REGISTERS..................................................48
9.1
T1 CONTROL REGISTERS .............................................................................................................................48
9.2
T1 TRANSMIT TRANSPARENCY ...................................................................................................................53
9.3
AIS-CI AND RAI-CI GENERATION AND DETECTION ..................................................................................53
9.4
T1 RECEIVE-SIDE DIGITAL-MILLIWATT CODE GENERATION.....................................................................54
10.
E1 FRAMER/FORMATTER CONTROL AND STATUS REGISTERS............................................57
10.1
E1 CONTROL REGISTERS.........................................................................................................................57
10.2
AUTOMATIC ALARM GENERATION .........................................................................................................61
10.3
E1 INFORMATION REGISTERS .................................................................................................................62
11.
COMMON CONTROL AND STATUS REGISTERS ..........................................................................64
11.1
T1/E1 STATUS REGISTERS ......................................................................................................................65


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