SCG9864
8-BIT MICROCONTROLLER
Score Concept Semiconductor Ltd.
3
Sept 2000
CPU core
An 8-bit accumulator based CPU core can directly address up to 64 x 16K byte addressing
space. Most of the instructions are executed in two cycles. Instruction is generally one byte
and will have an extra byte for some addressing modes.
CPU Registers:
Program Counter (PC)
The 14-bit Program Counter stores address for instruction fetch during program
execution. It makes up a page size of 16K bytes. Together with the Program Page
Register (iPAGE), it becomes a 20-bit address that can access up to 1,048,576 bytes.
When the CPU resets, the content of the iPAGE:PC will be 00:0000. If interrupt
occurs, the type of interrupt will then determine its content. PC will automatically be
incremented to the next instruction after an instruction fetch.
Table 1. Different types of interrupt
Interrupt
IPAGE:PC
Timer 0 / RTC Interrupt
3H:3FF0H
Timer 1 Interrupt
3H:3FE0H
External Interrupt
3H:3FD0H
Software Interrupt
3H:3FC0H
Page Register (PAGE)
An 8-bit Page Register to change the program flow. The most significant two bits are
always set to zero.
Data Bank Register (BANK)
An 8-bit Bank Register to access data memory. The most significant two bits are
always set to zero.
Program Page Register (iPAGE)
An 8-bit Program Page Register is combined with PC for instruction fetch. The most
significant two bits are always set to zero.
Accumulator (A)
An 8-bit Accumulator for arithmetic, logical and data movement operation.
Temporary Register (B)
An 8-bit temporarily storage for accumulator.
Index Registers (X, Y)
These two 8-bit registers can be used for general registers and index registers of the
indirect addressing mode. They can also be used as pointer for table read and
memory write instructions.
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
