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NB2305AI1DR2G Datasheet(PDF) 2 Page - ON Semiconductor |
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NB2305AI1DR2G Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 8 page NB2305A http://onsemi.com 2 Figure 1. Block Diagram REF PLL CLKOUT CLK1 CLK2 CLK3 CLK4 Figure 2. Pin Configuration VDD 1 2 3 4 8 7 6 5 REF CLK2 CLK1 GND CLKOUT CLK4 CLK3 NB2305A Table 1. PIN DESCRIPTION Pin # Pin Name Description 1 REF (Note1) Input reference frequency, 5 V tolerant input. 2 CLK2 (Note 2) Buffered clock output. 3 CLK1 (Note 2) Buffered clock output. 4 GND Ground. 5 CLK3 (Note 2) Buffered clock output. 6 VDD 3.3 V supply. 7 CLK4 (Note 2) Buffered clock output. 8 CLKOUT (Note 2) Buffered clock output, internal feedback on this pin. 1. Weak pulldown. 2. Weak pulldown on all outputs. |
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