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AMERICAN MICROSYSTEMS, INC.
April 2000
5
4.24.00
FS6128-01
FS6128-01
FS6128-01
FS6128-01
PLL Clock Generator IC with VCXO
PLL Clock Generator IC with VCXO
PLL Clock Generator IC with VCXO
PLL Clock Generator IC with VCXO
ISO9001
ISO9001
ISO9001
ISO9001
Table 6: AC Timing Specifications
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are
± 3σfrom typical.
PARAMETER
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
Overall
VCXO Stabilization Time *
tVCXOSTB
From power valid
10
ms
PLL Stabilization Time *
tPLLSTB
From VCXO stable
500
us
Synthesis Error
(unless otherwise noted in Frequency Table)
0
ppm
Clock Output (CLK)
Duty Cycle *
Ratio of high pulse width (as measured from rising
edge to next falling edge at VDD/2) to one clock period
45
55
%
Jitter, Period (peak-peak) *
tj(∆P)
From rising edge to next rising edge at VDD/2,
CL = 10pF
390
ps
Jitter, Long Term (
σ
y(
τ)) *
tj(LT)
From 0-500
µs at V
DD/2, CL = 10pF
compared to ideal clock source
155
ps
Rise Time *
tr
VDD = 3.3V; VO = 0.3V to 3.0V; CL = 10pF
1.7
ns
Fall Time *
tf
VDD = 3.3V; VO = 3.0V to 0.3V; CL = 10pF
1.7
ns
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