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ISP1504C Datasheet(PDF) 8 Page - NXP Semiconductors |
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ISP1504C Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 84 page ISP1504A_ISP1504C_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 19 October 2006 8 of 84 NXP Semiconductors ISP1504A; ISP1504C ULPI HS USB OTG transceiver • Differential receiver and single-ended receivers to receive data at high-speed, full-speed and low-speed • Squelch circuit to detect high-speed bus activity • High-speed disconnect detector • 45 Ω high-speed bus terminations on DP and DM for peripheral and host modes • 1.5 k Ω pull-up resistor on DP for full-speed peripheral mode • 15 k Ω bus terminations on DP and DM for host and OTG modes For details on controlling resistor settings, see Table 8. 7.4 Voltage regulator The ISP1504 contains a built-in voltage regulator that conditions the VCC supply for use inside the ISP1504. The voltage regulator: • Supports input supply range of 3.0V<VCC < 3.6 V • Supplies internal circuitry with 1.8 V and 3.3 V Remark: The REG1V8 and REG3V3 pins require external decoupling capacitors. For details, see Section 16. 7.5 Crystal oscillator and PLL The ISP1504 has a built-in crystal oscillator and a Phase-Locked Loop (PLL) for clock generation. The crystal oscillator takes a sine-wave input from an external crystal, on the XTAL1 pin, and converts it to a square wave clock for internal use. Alternatively, a square wave clock of the same frequency can also be directly driven into the XTAL1 pin. Using an existing square wave clock can save the cost of a crystal and also reduce the board size. The PLL takes the square wave clock from the crystal oscillator and multiplies or divides it into various frequencies for internal use. The PLL can also take a 60 MHz input from the CLOCK pin. This eliminates the need for an external crystal or clock on XTAL1. The PLL produces the following frequencies, irrespective of the clock source: • 60 MHz clock for the ULPI interface controller • 1.5 MHz for the low-speed USB data • 12 MHz for the full-speed USB data • 480 MHz for the high-speed USB data • Other internal frequencies for data conversion and data recovery 7.6 OTG module This module contains several sub-blocks that provide all the functionality required by the USB OTG specification. Specifically, it provides the following circuits: • The ID detector to sense the ID pin of the mini-USB cable. The ID pin dictates which device is initially configured as the host and which as the peripheral. |
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