P87LPC778FDH datasheet(6/79 Pages) PHILIPS

Part #	P87LPC778FDH

Description	CMOS single-chip 8-bit 80C51 microcontroller 128-byte data RAM, 8 kB OTP

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Manufacturer	PHILIPS [NXP Semiconductors]

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Philips Semiconductors

P87LPC778

CMOS single-chip 8-bit microcontroller

Product data

Rev. 01 — 31 March 2004

6 of 79

9397 750 12378

P0.7

13

I/O

T1 — Timer/counter 1 external count input or overﬂow output.

P1.0 - P1.7

12-8, 4, 3,

2

I/O

Port 1: Port 1 is an 8-bit I/O port with a user-conﬁgurable output type, except for three

pins as noted below. Port 1 latches are conﬁgured in the quasi-bidirectional mode and

have either ones or zeros written to them during reset, as determined by the PRHI bit in

the UCFG1 configuration byte. The operation of the configurable port 1 pins as inputs

and outputs depends upon the port conﬁguration selected. Each of the conﬁgurable

port pins are programmed independently. Refer to Section 8.9 “I/O ports” and Table 67

“DC electrical characteristics” for details.

Port 1 also provides various special functions as described below:

P1.0

12

O

TxD — Transmitter output for the serial port.

P1.1

11

I

RxD — Receiver input for the serial port.

P1.2

10

I/O

T0 — Timer/counter 0 external count input or overﬂow output.

I/O

SCL — I2C-bus serial clock input/output. When conﬁgured as an output, P1.2 is open

drain, in order to conform to I2C-bus speciﬁcations.

P1.3

9

I

INT0 — External interrupt 0 input.

I/O

SDA — I2C-bus serial data input/output. When conﬁgured as an output, P1.3 is open

drain, in order to conform to I2C-bus speciﬁcations.

P1.4

8

I

INT1 — External interrupt 1 input.

P1.5

4

I

RST — External Reset input (if selected via EPROM conﬁguration). A LOW on this pin

resets the microcontroller, causing I/O ports and peripherals to take on their default

states, and the processor begins execution at address 0. When used as a port pin, P1.5

is a Schmitt trigger input only.

P1.6

3

O

P1.6 — Port 1 bit 6.

O

PWM1 — PWM output 1.

P1.7

2

O

P1.7 — Port 1 bit 7.

O

PWM2 — PWM output 2.

P2.0 - P2.1

7, 6

I/O

Port 2: Port 2 is a 2-bit I/O port with a user-conﬁgurable output type. Port 2 latches are

conﬁgured in the quasi-bidirectional mode and have either ones or zeros written to them

during reset, as determined by the PRHI bit in the UCFG1 conﬁguration byte. The

operation of port 2 pins as inputs and outputs depends upon the port conﬁguration

selected. Each port pin is conﬁgured independently. Refer to Section 8.9 “I/O ports” and

Table 67 “DC electrical characteristics” for details.

Port 2 also provides various special functions as described below:

P2.0

7

O

X2 — Output from the oscillator ampliﬁer (when a crystal oscillator option is selected via

the EPROM conﬁguration.

O

CLKOUT — CPU clock divided by 6 clock output when enabled via SFR bit and in

conjunction with internal RC oscillator or external clock input.

P2.1

6

I

X1 — Input to the oscillator circuit and internal clock generator circuits (when selected

via the EPROM conﬁguration).

VSS

5I

Ground: 0 V reference.

VDD

15

I

Power Supply: This is the power supply voltage for normal operation as well as Idle

and Power-down modes.

Table 2:

Pin description…continued

Symbol

Type

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