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GE28F128L30T110 Datasheet(PDF) 1 Page - Intel Corporation

Part # GE28F128L30T110
Description  1.8 Volt Intel StrataFlash짰 Wireless Memory with 3.0-Volt I/O (L30)
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

GE28F128L30T110 Datasheet(HTML) 1 Page - Intel Corporation

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1.8 Volt Intel StrataFlash
® Wireless
Memory with 3.0-Volt I/O (L30)
28F640L30, 28F128L30, 28F256L30
Datasheet
Product Features
The 1.8 Volt Intel StrataFlash
® wireless memory with 3-Volt I/O product is the latest generation of
Intel StrataFlash
® memory devices featuring flexible, multiple-partition, dual operation. It provides high
performance synchronous-burst read mode and asynchronous read mode using 1.8 volt low-voltage, multi-
level cell (MLC) technology.
The multiple-partition architecture enables background programming or erasing to occur in one partition
while code execution or data reads take place in another partition. This dual-operation architecture also
allows two processors to interleave code operations while program and erase operations take place in the
background.
The
1.8 Volt Intel StrataFlash
® wireless memory with 3-Volt I/O device is manufactured using Intel
0.13 µm ETOX™ VIII process technology. It is available in industry-standard chip scale packaging.
.
High performance Read-While-Write/Erase
—85 ns initial access
—52MHz with zero wait state, 17 ns clock-to-data
output synchronous-burst mode
— 25 ns asynchronous-page mode
—4-, 8-, 16-, and continuous-word burst mode
—Burst suspend
— Programmable WAIT configuration
—Buffered Enhanced Factory Programming
(Buffered EFP): 3.5 µs/byte (Typ)
—1.8 V low-power buffered and non-buffered
programming @ 10 µs/byte (Typ)
Architecture
— Asymmetrically-blocked architecture
— Multiple 8-Mbit partitions: 64Mb and 128Mb
devices
— Multiple 16-Mbit partitions: 256Mb devices
—Four 16-KWord parameter blocks: top or
bottom configurations
— 64K-Word main blocks
— Dual-operation: Read-While-Write (RWW) or
Read-While-Erase (RWE)
— Status register for partition and device status
Power
—1.7 V - 2.0 V VCC operation
—I/O voltage: 2.2 V - 3.3 V
— Standby current: 30 µA (Typ)
—4-Word synchronous read current: 17 mA (Typ)
@ 54 MHz
— Automatic Power Savings (APS) mode
Software
—20 µs (Typ) program suspend
—20 µs (Typ) erase suspend
—Intel® Flash Data Integrator (FDI) optimized
—Basic Command Set (BCS) and Extended
Command Set (ECS) compatible
— Common Flash Interface (CFI) capable
Security
—OTP space:
— 64 unique device identifier bits
— 64 user-programmable OTP bits
— Additional 2048 user-programmable OTP
bits
— Absolute write protection: VPP = GND
— Power-transition erase/program lockout
— Individual zero-latency block locking
— Individual block lock-down
Quality and Reliability
— Expanded temperature: –25° C to +85° C
— Minimum 100,000 erase cycles per block
—ETOX™ VIII process technology (0.13 µm)
Density and Packaging
—64-, 128- and 256-Mbit density in VF BGA
packages
— 128/0, and 256/0 Density in Stacked-CSP
— 16-bit wide data bus
Order Number: 251903-003
April 2003
Notice:
This document contains information on products in the design phase of
development. The information here is subject to change without notice. Do not finalize
a design with this information.


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