MB90096

11

(2) Vertical and horizontal sync signal input timing

*1: The horizontal sync pulse time is applied after MB90096 internal operations have paused and horizontal operation

has been synchronized. For this reason it is necessary to leave an interval between commands so that writing

to VRAM (command 2, 4) is not performed more than once.

It is necessary to set the horizontal sync signal pulse width and interval for writing to VRAM so that the horizontal

sync signal pulse width is less than the writing interval to VRAM.

*2: Applied when an external dot clock signal is input.

*3: Applied in interlaced display, when the EVEN signal is applied from an external source.

Parameter

Symbol

Pin name

Value

Unit

Remarks

Min

Max

Horizontal sync signal rise time

HSYNC



500

ns

Horizontal sync signal fall time



500

ns

Vertical sync signal rise time

VSYNC



500

ns

Vertical sync signal fall time



500

ns

Horizontal sync signal pulse

HSYNC

18



Dot clock



6

µs

Vertical sync signal pulse width

VSYNC

220

H

Horizontal sync signal setup time

HSYNC

6



ns

*2

Horizontal sync signal hold time

3



ns

*2

Vertical sync signal setup time

VSYNC

41H

− 4

Dot clock

Vertical sync signal hold time

220

H

Vertical sync signal setup time

when field signal is generated

VSYNC

18



Dot clock

*3

Vertical sync signal hold time

when field signal is generated

VSYNC

18



Dot clock

*3

VSYNC

HSYNC

•••• Vertical and horizontal sync signal input timing