CY7C457 datasheet(11/23 Pages) CYPRESS

Part #	CY7C457

Description	512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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CY7C455

CY7C456

CY7C457

Document #: 38-06003 Rev. *A

Page 11 of 23

Notes:

30. CKW is clock and CKR is opposite clock.

31. Count = 1,025 indicates Half Full for the CY7C446 and CY7C456. Count = 513 indicates Half Full for the CY7C447 and CY7C457. Count = 257 indicates

Half Full for the CY7C448 and CY7C458.

32. When the FIFO contains 1,024 [512] [256] words, the rising edge of the next enabled write causes the HF to be true (LOW).

33. The HF write flag update cycle does not affect the count because ENW is HIGH. It only updates HF to HIGH.

34. When making the transition from Half Full to Less Than Half Full, the count must decrease by two (i.e., 1,025 Á1,023; two enabled reads: R2 and R3)

before a write (W4) can update flags to less than Half Full.

Switching Waveforms (continued)

Write to Half Full Timing Diagram with Free-Running Clocks

1025

1023

1025

tSKEW1

tSKEW2

tFD

ENABLED

WRITE

ENABLED

WRITE

ENABLED

WRITE

ENABLED

WRITE

ENABLED

READ

ENABLED

READ

1024

1026

c455-15

[513]

[512]

[511]

[512]

[513]

[514]

Write to Half Full Timing Diagram with Write Flag Update Cycle with Free-Running Clocks

1024

1025

1023

1025

tSKEW1

tSKEW2

tFD

ENABLED

WRITE

FLAG

UPDATE

ENABLED

WRITE

ENABLED

WRITE

1024

1026

ENABLED

WRITE

ENABLED

READ

ENABLED

READ

WRITE

FLAG UPDATE CYCLE

[512]

[513]

[512]

[511]

[512]

[513]

[514]

PAFE

c455–16

ENW

ENR

HF

PAFE

E/F

HIGH

W1

W2

W3

W4

W5

W6

R1

R4

R5

R6

R3

R2

W1

W2

W3

W4

W5

W6

W7

R1

R4

R5

R6

R2

R3

R7

[257]

[256]

[255]

[256]

[257]

[258]

1023 [511]

[255] (no change)

[256]

[257]

[256]

[255]

[256]

[257]

[258]

1024

[512]

ENR

HF

E/F

HIGH

[256]

COUNT

ENW

CKW

CKR

COUNT

CKW

CKR

[22, 30, 31, 32]

[22, 30, 31, 32, 33, 34]

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