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MAS2911CL Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers

Part # MAS2911CL
Description  RADIATION HARD MICROPROGRAM SEQUENCER
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MA2909/11
3
The 2909/2911 are CMOS SOS microprogram sequencers
intended for use in high-speed microprocessor applications.
The device is a cascadable 4-bit slice such that two devices
allow addressing of up to 256 words of microprogram and
three devices allow addressing of up to 4K words of
microprogram. A detailed logic diagram is shown in figure 1.
The device contains a four input multiplexer that is used to
select either the address register, direct inputs, microprogram
counter, or file as the source of the next microinstruction
address. This multiplexer is controlled by the S0 and S1 inputs.
The address register consists of four D-type, edge
triggered flip-flops with a common clock enable. When the
address register enable is LOW, new data is entered into the
register on the clock LOW-to-HlGH transition. The address
register is available at the multiplexer as a source for the next
microinstruction address The direct input is a 4-bit field of
inputs to the multiplexer and can be selected as the next
microinstruction address. On the 2911 the direct inputs are
also used as inputs to the register. This allows an N-way
branch where N is any word in the microcode.
The 2909/2911 contains a microprogram counter (µPC)
that is composed of a 4-bit incrementer followed by a 4bit
register. The incrementer has carry-in (Cn) and carry-out (Cn +
4) such that cascading to larger word lengths is straight
forward. The µPC can be used in either of two ways. When the
least significant carry-in to the incrementer is HIGH, the
microprogram register is loaded on the next clock cycle with
the current Y output word plus one (Y + 1 § µPC). Thus
sequential microinstructions can be executed. If this least
significant Cn is LOW, the incrementer passes the Y output
word unmodified and the microprgram register is loaded with
the same Y word on the next clock cycle (Y § µPC). Thus, the
same microinstruction can be executed any number of times
by using the 4x4 file (stack). The file is used to provide return
address linkage when executing microsubroutines. The file
contains a built-in stack pointer (SP) which always points to the
last file word written. This allows stack reference operations
(looping) to be performed without a push or pop.
The stack pointer operates as an up/down counter with
separate push/pop and file enable inputs. When the file enable
input is LOW and the push/pop input is HIGH, the PUSH
operation is enabled. This causes the stack pointer to
increment and the file to be written with the required return
linkage - the next microinstruction address following the
subroutine jump which initiated the PUSH.
If the file enable input is LOW and the push/pop control is
LOW, a POP operation occurs. This implies the usage of the
return linkage during this cycle and thus a return from
subroutine. The next LOW-to-HlGH clock transition causes the
stack pointer to decrement. If the file enable is HIGH, no action
is taken by the stack pointer regardless of any other input.
The stack pointer linkage is such that any combination of
push, pop or stack references can be achieved. One
microinstruction subroutine can be performed. Since the stack
is 4 words deep, up to four microsubroutines can be nested.
The ZERO input is used to force the four outputs to the
binary zero state. When the ZERO input is LOW all Y outputs
are LOW regardless of any other inputs (except OE). Each Y
output bit also has a separate OR input such that a conditional
logic one can be forced at each Y output. This allows jumping
to different microinstructions on programmed conditions.
The 2909/2911 feature three-state Y outputs. These can
be particularly useful in designs requiring external equipment
to provide automatic checkout of the microprocessor. The
internal control can be placed in the high impedance state and
preprogrammed.
MULTIPLEXER SELECT CODES
Table 1 lists the select codes for the multiplexer. The two
bits applied from the microword register (and additional
combinational logic for branching) determine which data
source contains the address for the next microinstruction. The
contents of the selected source will appear on the Y outputs.
Table 1 also shows the truth table for the output control and for
the control of the push/pop stack. Table 2 shows in detail the
effect of S0, S1, FE and PUP on the 2909. These four signals
define the address that apears on the Y outputs and what the
state of all the internal registers will be following the clock
LOW-to-HlGH edge. In this illustration, the microprogram
counter is assumed to contain initially some word J, the
address register some word K, and the four words in the push/
pop stack contain Ra through Rd.
OR1
X
X
H
L
ZERO
X
L
H
H
OE
H
L
L
L
H = High, L = Low, Z = High Impedance
Table 1a: Output Control
FE
H
L
L
ZERO
X
H
L
PUSH-POP stack change
No change
Increment stack pointer, then push
current PC on to STK0
Pop stack (decrement stack pointer)
H = High, L = Low, X = Irrelevant
Table 1b: Synchronous Stack Control
S1
L
L
H
H
S2
L
H
L
H
Symbol
µPC
AR
STKO
D1
Source for Y outputs
Microprogram counter
Address/Holding register
Push-Pop stack
Direct inputs
Table 1c: Address Selection
Y1
Z
L
H
Source selected by S0S1


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