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MK9173-01CS08 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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MK9173-01CS08 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 7 page Integrated Circuit Systems, Inc. General Description Features Integrated Circuit Systems, Incorporated • 525 Race Street • San Jose • CA • 95126 • (408) 295-9800tel • www.icst.com MK9173-01 MK9173-15 Block Diagram Video Genlock PLL MDS 9173-01/15 B • Designed to replace the AV9173 in most applications • Phase-detector/VCO circuit block • Ideal for genlock system • Reference clock range 12 kHz to 1M Hz for full output clock range • Output clock range 1.25 to 75 M Hz (-01), 0.625 to 37.5 MHz (-15), see Table 1 for conditions • On-chip loop filter • Single 5 volt power supply • Low power CMOS technology • Small 8-pin SOIC package The MK9173-01 and MK9173-15 provide the analog PLL circuit blocks to implement a frequency multiplier. Because the device is configured to use an external divider in the PLL clock feedback path, a large divider can be used to result in a large frequency multiplication ratio. This is useful when using a low frequency input clock to generate a high frequency output clock. The MK9173-01/15 contains a phase detector, charge pump, loop filter, and voltage-controlled oscillator (VCO). The ICS674-01 can be used as the external feedback divider. A common application of the MK9173-01/-15 is the implementation of a video genlock circuit. Because of this, the MK9173-01/-15 inputs operate on the negative-going clock edge. The MK9173-01/15 is pin and function compatible to the AV9173-01/15. Please refer to page 4 regarding performance differences. For new video genlock designs, please refer to the ICS673-01, ICS1522 or ICS1523. 121400 |
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