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DSP56800ERM Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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DSP56800ERM Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 12 page 56F8025 Digital Signal Controller Product Brief, Rev. 0 Preliminary—Subject to Change Without Notice 56F8025 Description Freescale Semiconductor 2 The 56F8025 supports program execution from internal memories. Two data operands can be accessed from the on-chip data RAM per instruction cycle. The 56F8025 also offers up to 35 General-Purpose Input/Output (GPIO) lines, depending on peripheral configuration. The 56F8025 Digital Signal Controller includes 32KB of Program Flash and 4KB of Unified Data/Program RAM. Program Flash memory can be independently bulk erased or erased in pages. Program Flash page erase size is 512 Bytes (256 Words). A full set of programmable peripherals — PWM, ADCs, QSCI, QSPI, I2C, PIT, Quad Timers, DACs, and analog comparators — supports various applications. Each peripheral can be independently shut down to save power. Any pin in these peripherals can also be used as General Purpose Input/Outputs (GPIOs). Figure 1. 56F8025 Block Diagram Programmable Interval Timer Program Controller and Hardware Looping Unit Data ALU 16 x 16 + 36 -> 36-Bit MAC Three 16-bit Input Registers Four 36-bit Accumulators Address Generation Unit Bit Manipulation Unit 16-Bit 56800E Core Interrupt Controller 4 Unified Data / Program RAM 2K x 16 PDB PDB XAB1 XAB2 XDB2 CDBR QSPI or PWM or I2C or TMRA or GPIOB IPBus Bridge (IPBB) System Bus Control R/W Control Memory PAB PAB CDBW CDBR CDBW JTAG/EOnCE Port or GPIOD Digital Reg Analog Reg Low-Voltage Supervisor VCAP VDD VSS_IO VDDA VSSA 4 RESET or GPIOA AD0 4 Clock Generator* System Integration Module P O R O S C PWM or TMRA or CMP or GPIOA *Includes On-Chip Relaxation Oscillator COP/ Watchdog AD1 4 Program Memory 16K x 16 Flash ADC or CMP or GPIOC QSCI or PWM or I2C or TMRA or GPIOB 3 3 I2C or CMP or GPIOB 2 2 XTAL, CLKIN, or GPIOD EXTAL or GPIOD 2 11 DAC |
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