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PSB2115 Datasheet(PDF) 10 Page - Siemens Semiconductor Group |
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PSB2115 Datasheet(HTML) 10 Page - Siemens Semiconductor Group |
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10 / 317 page  PSB 2115 PSF 2115 List of Figures Page Semiconductor Group 10 11.97 Figure 41: Timing Diagram for DMA-Transfers (slow) Transmit (n < 64, remainder of a long message or n = k × 64) 105 Figure 42: Timing Diagram for DMA-Transfer (fast) Receive (n = k × 64) . . . . . . . . 105 Figure 43: Timing Diagram for DMA-Transfers (slow) Receive (n = k × 64) . . . . . . 106 Figure 44: Timing Diagram for DMA-Transfers (slow or fast) Receive (n = 4, 8, 16 or 32) 106 Figure 45: DMA-Transfers with Pulsed DACK (read or write) . . . . . . . . . . . . . . . . . 106 Figure 46: Configuration of RFIFOB (Long Frames) . . . . . . . . . . . . . . . . . . . . . . . . 108 Figure 47: Configuration of RFIFOB (Short Frames). . . . . . . . . . . . . . . . . . . . . . . . 109 Figure 48: Timer 1 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 Figure 49: Timer 2 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Figure 50: Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Figure 51: Channel Structure of IOM-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Figure 52: Multiplexed Frame Structure of the IOM-2 Interface in Non-TE Timing Mode 114 Figure 53: Definition of IOM-2 Channels in Terminal Timing Mode . . . . . . . . . . . . . 115 Figure 54: Data Strobe Signal Generation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Figure 55: IOM-2 Direction Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Figure 56: IOM-2 Data Ports DU/DD in Terminal Mode (MODE0=0) . . . . . . . . . . . 120 Figure 57: IOM-2 Data Ports DU/DD in LT-T Mode (MODE0=1, MODE1=1) . . . . . 121 Figure 58: IOM-2 Data Ports DU/DD in LT-S Mode (MODE0=1, MODE1=0) with Normal Layer 2 Direction (SPCR:SDL=1) 123 Figure 59: IOM-2 Data Ports DU/DD in LT-S Mode (MODE0=1, MODE1=0) with Inversed Layer 2 Direction (SPCR:SDL=0) 124 Figure 60: Principle of B/IC Channel Access in IOM-2 Terminal Mode . . . . . . . . . . 126 Figure 61: Access to B and IC Channels in IOM-2 Terminal Mode . . . . . . . . . . . . . 126 Figure 62: Examples of MONITOR Channel Applications in IOM-2 TE Mode. . . . . 129 Figure 63: MONITOR Channel Protocol (IOM-2). . . . . . . . . . . . . . . . . . . . . . . . . . . 131 Figure 64: Handshake Protocol with a 2-Byte Monitor Message/Response . . . . . . 134 Figure 65: Abortion of Monitor Channel Transmission . . . . . . . . . . . . . . . . . . . . . . 136 Figure 66: Applications of TIC Bus in IOM-2 Bus Configuration . . . . . . . . . . . . . . . 140 Figure 67: Structure of Last Octet of Ch2 on DU. . . . . . . . . . . . . . . . . . . . . . . . . . . 141 Figure 68: Structure of Last Octet of Ch2 on DD. . . . . . . . . . . . . . . . . . . . . . . . . . . 142 Figure 69: Input/Output Characteristic of AUX Pins . . . . . . . . . . . . . . . . . . . . . . . . 144 Figure 70: PCM Frame Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 Figure 71: PCM Bit Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 Figure 72: Switching Data between PCM and IOM-2 . . . . . . . . . . . . . . . . . . . . . . . 149 Figure 73: Data Path Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 Figure 74: Generation of FSC and BCL in LT-T mode . . . . . . . . . . . . . . . . . . . . . . 150 Figure 75: Multiline Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151 Figure 76: Switching of PCM Timeslots on IOM-2 Channel B1 . . . . . . . . . . . . . . . . 152 Figure 77: Buffered Oscillator Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154 |
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