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MC68HC908LJ12 Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MC68HC908LJ12 Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 413 page Table of Contents MC68HC908LJ12 — Rev. 2.1 Technical Data Freescale Semiconductor Table of Contents 11 8.7 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 8.8 Special Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 8.8.1 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 8.8.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 8.8.3 CGM During Break Interrupts. . . . . . . . . . . . . . . . . . . . . . . 126 8.9 Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . . 127 8.9.1 Acquisition/Lock Time Definitions. . . . . . . . . . . . . . . . . . . . 127 8.9.2 Parametric Influences on Reaction Time . . . . . . . . . . . . . . 127 8.9.3 Choosing a Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Section 9. System Integration Module (SIM) 9.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 9.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 9.3 SIM Bus Clock Control and Generation . . . . . . . . . . . . . . . . . 134 9.3.1 Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 9.3.2 Clock Start-up from POR or LVI Reset. . . . . . . . . . . . . . . . 135 9.3.3 Clocks in Stop Mode and Wait Mode . . . . . . . . . . . . . . . . . 136 9.4 Reset and System Initialization. . . . . . . . . . . . . . . . . . . . . . . . 136 9.4.1 External Pin Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 9.4.2 Active Resets from Internal Sources . . . . . . . . . . . . . . . . . 137 9.4.2.1 Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 9.4.2.2 Computer Operating Properly (COP) Reset. . . . . . . . . . 139 9.4.2.3 Illegal Opcode Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 9.4.2.4 Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 9.4.2.5 Low-Voltage Inhibit (LVI) Reset . . . . . . . . . . . . . . . . . . . 140 9.4.2.6 Monitor Mode Entry Module Reset (MODRST) . . . . . . . 140 9.5 SIM Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 9.5.1 SIM Counter During Power-On Reset . . . . . . . . . . . . . . . . 141 9.5.2 SIM Counter During Stop Mode Recovery . . . . . . . . . . . . . 141 9.5.3 SIM Counter and Reset States. . . . . . . . . . . . . . . . . . . . . . 141 9.6 Exception Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 9.6.1 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 9.6.1.1 Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 9.6.1.2 SWI Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 |
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