© 2006 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FMS6502 Rev. 1.0.0

4

Digital Interface

enables, input-to-output routing, and input bias configu-

0110) with the ability to offset based upon the values of

the ADDR0 and ADDR1 inputs. Offset addresses are

defined below:

Data and address data of eight bits each are written to

functions.

For efficiency, a single data register is shared between

two outputs for input selection. More than one output can

select the same input channel for one-to-many routing.

The clamp / bias control bits are written to their own

internal address since they should remain the same

regardless of signal routing. They are set based on the

input signal that is connected to the FMS6502.

All undefined addresses may be written without effect.

Output Control Register Contents and Defaults

Output Control Register MAP

Clamp Control Register Contents and Defaults

Clamp Control Register Map

Gain Control Register Contents and Defaults

Gain Control Register Map

Note:

1. When the OFF input selection is used, the output amplifier is powered down and enters a high-impedance state.

ADDR1

ADDR0

Binary

Hex

0

0

0000 0110

0x06

0

1

0100 0110

0x46

1

0

1000 0110

0x86

1

1

1100 0110

0xC6

Control Name

Width

Type

Default

Bit(s)

Description

In-A

4 bits

Write

0

3:0

Input selected to drive this output:

In-B

4 bits

Write

0

7:4

Input selected to drive this output:

Name

Address

Bit 7

Bit 6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

OUT1,2

0x00

B3-Out2

B2-Out2

B1-Out2

B0-Out2

B3-Out1

B2-Out1

B1-Out1

B0-Out1

OUT3,4

0x01

B3-Out4

B2-Out4

B1-Out4

B0-Out4

B3-Out3

B2-Out3

B1-Out3

B0-Out3

OUT5,6

0x02

B3-Out6

B2-Out6

B1-Out6

B0-Out6

B3-Out5

B2-Out5

B1-Out5

B0-Out5

Control Name

Width

Type

Default

Bit(s)

Description

Clmp

1 bit

Write

0

7:0

Clamp / Bias selection: 1 = Clamp, 0 = Bias

Name

Address

Bit 7

Bit 6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

CLAMP

0x03

Clmp8

Clmp7

Clmp6

Clmp5

Clmp4

Clmp3

Clmp2

Clmp1

Control Name

Width

Type

Default

Bit(s)

Description

Gain

1 bit

Write

0

7:0

Output Gain selection: 0 = 6dB, 1 = 0dB

Name

Address

Bit 7

Bit 6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

GAIN

0x04

Unused

Unused

Gain6

Gain5

Gain4

Gain3

Gain2

Gain1