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TSC87C52 Datasheet(PDF) 3 Page - TEMIC Semiconductors |
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TSC87C52 Datasheet(HTML) 3 Page - TEMIC Semiconductors |
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3 / 6 page  TSC87C51/52 3 MATRA MHS Rev. A – 10 September 1997 87C51 OTP product features by supplier Feature TEMIC TSC80C51 TEMIC TSC87C51 INTEL 87C51 Philips 87C51 LG GMS80C7004 Atmel AT89C51 Windbond W87E51 Power off Flag No Yes Yes No No No No UART : Automatic Address Recognition No No Yes No No No No UART : Framing er- ror Detection No Yes Yes No No No No Power–Down output using external inter- rupt No No Yes No No No No ALE disabling Yes Yes Yes No No No No ONCE mode No Yes Yes No No Yes No EPROM lock bits NA Yes2 Yes Yes Yes Yes Yes Four levels priority interrupt No No Yes No No No No Full static design (Frequency down to 0 Mhz) Yes Yes No No Yes Yes Yes Supply voltage 5 V Yes Yes Yes Yes Yes Yes Yes 3 V Yes Yes2 No No No Yes No Speed 12/16 MHz Yes Yes Yes Yes Yes Yes Yes 24 MHz Yes Yes Yes Yes Yes Yes Yes 33 MHz Yes Yes Yes No No No Yes 40 MHz Yes Yes2 No No No No Yes Range 0 °C to 70°C Yes Yes Yes Yes Yes Yes Yes –40 °C to 85°C Yes Yes Yes3 Yes Yes Yes No Package PDIL 40 Yes Yes Yes Yes Yes Yes Yes PLCC 44 Yes Yes Yes Yes Yes Yes Yes PQFP 44 Yes Yes Yes No No Yes No TQFP 44 Yes Yes No No No Yes No Power consumption (Max., 5V) (at 16 MHz) (at 16 MHz) (at 16 MHz) (at 16 MHz) (at 12 MHz) (at 12 MHz) (at 20 MHz) Active (mA) 25 25 38 32 21 25 50 Idle (mA) 6.5 8.5 9.5 5 18 6.5 7 PD ( µA) 30 50 75 50 50 100 50 1 No clock out generation 2 Under study, no yet available. 3 except 33 Mhz NA: Not Available |
Similar Part No. - TSC87C52 |
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