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M30624MGN-XXXGP Datasheet(PDF) 10 Page - Mitsubishi Electric Semiconductor

Part # M30624MGN-XXXGP
Description  SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M30624MGN-XXXGP Datasheet(HTML) 10 Page - Mitsubishi Electric Semiconductor

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Memory
10
Mitsubishi microcomputers
M16C / 62N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Operation of Functional Blocks
The M16C/62N group accommodates certain units in a single chip. These units include ROM and RAM to
store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.
Also included are peripheral units such as timers, serial I/O, D-A converter, DMAC, CRC calculation circuit,
A-D converter, and I/O ports.
The following explains each unit.
Memory
Figure 1.3.1 is a memory map of the M16C/62N group. The address space extends the 1M bytes from
address 0000016 to FFFFF16. From FFFFF16 down is ROM. For example, in the M30620MCN-XXXFP,
there is 128K bytes of internal ROM from E000016 to FFFFF16. The vector table for fixed interrupts such as
_______
the reset and NMI are mapped to FFFDC16 to FFFFF16. The starting address of the interrupt routine is
stored here. The address of the vector table for timer interrupts, etc., can be set as desired using the
internal register (INTB). See the section on interrupts for details.
From 0040016 up is RAM. For example, in the M30620MCN-XXXFP, 12K bytes of internal RAM is mapped
to the space from 0040016 to 033FF16. In addition to storing data, the RAM also stores the stack used when
calling subroutines and when interrupts are generated.
The SFR area is mapped to 0000016 to 003FF16. This area accommodates the control registers for periph-
eral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Figures 1.6.1 to 1.6.3 are location
of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and cannot be
used for other purposes.
The special page vector table is mapped to FFE0016 to FFFDB16. If the starting addresses of subroutines
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
In memory expansion mode and microprocessor mode, a part of the spaces are reserved and cannot be
used. For example, in the M30620MCN-XXXFP, the following spaces cannot be used.
• The space between 0340016 and 03FFF16 (Memory expansion and microprocessor modes)
• The space between D000016 and DFFFF16 (Memory expansion mode)
Figure 1.3.1. Memory map
0000016
YYYYY16
FFFFF16
0040016
0400016
XXXXX16
D000016
External area
Internal ROM area
SFR area
For details, see Figures
1.6.1 to 1.6.3
Internal RAM area
Internal reserved
area (Note 1)
Internal reserved
area (Note 2)
FFE0016
FFFDC16
FFFFF16
Note 1: During memory expansion and microprocessor modes, can not be used.
Note 2: In memory expansion mode, can not be used.
Note 3: These memory maps show an instance in which PM13 is set to 0; but in the
case of products in which the internal RAM and the internal ROM are expanded
to over 15 Kbytes and 192 Kbytes, respectively, they show an instance in which
PM13 is set to 1.
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
Reset
Special page
vector table
DBC
NMI
Address YYYYY16
053FF16
Address XXXXX16
ROM size
02BFF16
10K bytes
20K bytes
RAM size
C000016
E000016
128K bytes
256K bytes
033FF16
12K bytes


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