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KS8721B Datasheet(PDF) 9 Page - Micrel Semiconductor |
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KS8721B Datasheet(HTML) 9 Page - Micrel Semiconductor |
9 / 32 page August 2003 9 KS8721B/BT KS8721B/BT Micrel Strapping Options(Note 1) Pin Number Pin Name Type(Note 2) Description 6,5, PHYAD[4:1]/ Ipd/O PHY Address latched at power-up/reset. The default PHY address is 00001. 4,3 RXD[0:3] 25 PHYAD0/ Ipu/O INT# 9 PCS_LPBK/ Ipd/O Enables PCS_LPBK mode at power-up/reset. PD (default) = Disable, PU = Enable. RXDV 11 ISO/RXER Ipd/O Enables ISOLATE mode at power-up/reset. PD (default) = Disable, PU = Enable. 21 RMII/COL Ipd/O Enables RMII mode at power-up/reset. PD (default) = Disable, PU = Enable. 22 RMII_BTB Ipd/O Enable RMII_BTB mode at power-up/reset. PD (default) = Disable, PU = Enable. CRS 27 SPD100/ Ipu/O Latched into Register 0h bit 13 during power-up/reset. PD = 10Mbps, PU (default) No FEF/ = 100Mbps. If SPD100 is asserted during power-up/reset, this pin also latched as LED1 the Speed Support in register 4h. (If FXEN is pulled up, the latched value 0 means no Far_End _Fault.) 28 DUPLEX/ Ipu/O Latched into Register 0h bit 8 during power-up/reset. PD = Half duplex, PU LED2 (default) = Full duplex. If Duplex is pulled up during reset, this pin also latched as the Duplex support in register 4h. 29 NWAYEN/ Ipu/O Nway (auto-negotiation) Enable. Latched into Register 0h bit 12 during power-up/ LED3 reset. PD = Disable Auto-Negotiation, PU (default) = Enable Auto-Negotiation. 30 PD# Ipu Power Down Enable. PU (default) = Normal operation, PD = Power down mode. Note 1. Strap-in is latched during power-up or reset. Note 2. Ipu = input w/ internal pull-up Ipd = input w/ internal pull-down Ipd/O = input w/ internal pull-down during reset, output pin otherwise Ipu/O = input w/ internal pull-up during reset, output pin otherwise PU = strap pin pull-up PD = strap pin pull-down |
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