COMMERCIALTEMPERATURERANGE

IDTCV110L

PROGRAMMABLEFLEXPCCLOCKFORP4PROCESSOR

5

IDT CONFIDENTIAL

CONTROLREGISTERS

N PROGRAMMING PROCEDURE

•

Use Index byte write.

•

For N programming, the user only needs to access Byte17, Byte 25, and Byte8.

1.

Write Byte17 for CPU PLL N, CPU f = N* Resolution, see resolution table below Byte17.

2.

Write Byte25 for SRC PLL N, SRC f = N*0.666667, PCI = SRC f /3, SATA f = SRC f.

3.

Enable N Programming bit, Byte8 bit1. Once this bit is enabled, any N value will be changed on the fly.

•

Center spread only works when the N Programming bit is enabled. Down spread is OK even N Programming bit is disabled

•

It is OK to change N value to any value on the bench test board. In the system, IDT recommends the stepping change. It is unknown how much

the system can sustain for each stepping change; the estimate is about 5. If the N changes too much in one step, the system will likely hang.

•

Note that SATA is with SRC PLL. This SATA Hard Drive might not operate during SRC N programming.

MostoftheBytes,fromByte8-Byte31,areusedtoadjustoutputwaveformsandSSCmodulationprofiles.Thepoweronsettingwillbechangedaccording

to each power on frequency selection. To avoid mistakes, don’t write on those byte (be careful about Block Write). It is suggested to use the Index Byte

writetoaccessbytes.

SSC MAGNITUDE CONTROL, SMC

SMC[2:0]

000

-0.25

001

-0.5

010

-0.75

011

-1

100

±0.125

101

±0.25

110

±0.375

111

±0.5

FS_C, B, A

CPU

101

100

001

133

011

166

010

200

000

266

100

333

110

400

111

RESERVE

FREQUENCY SELECTION TABLE

RESOLUTION

CPU (MHz)

Resolution

N =

100

0.666667

150

133

0.666667

200

166

1.333333

125

200

1.333333

150

266

1.333333

200

333

2.666667

125

400

2.666667

150