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VP7615 Datasheet(PDF) 3 Page - Mitel Networks Corporation |
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VP7615 Datasheet(HTML) 3 Page - Mitel Networks Corporation |
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3 / 25 page  3 VP7615 THEORY OF OPERATION General Overview The VP7615 iCamHost™ is a fully synchronous real-time pipeline pixel processor for converting digitized CCD photosite samples into co-sited, colour calibrated, gamma corrected and aperture corrected digital video in an industry- conventional format similar to analog video decoders. The VP7615 supports the full iVision™ Command Set for control of camera head functions such as frame rate, resolution, exposure and colour depth via the CamPort™ Interface. Access to all registers and functions is provided by an I 2 C state machine. Demux and sync recovery The incoming CCD photosite bytes come in a single nibble at a time in a “big-endian” fashion from one of two CamPort™s. These nibbles are clocked in via a separate pixel clock signal. The formatting signals such as start of active video, end of active video, and start of new frame are all encoded into the nibble stream. The output is an 8 bit byte of CCD sample for each pixel clock, as well as separate horizontal and vertical sync signals. RAM control & 2H line delay FIFO RAM Since the iCamHost™ assumes an interlaced scanning CCD with a CMYG colour mosaic format, the colour content is derived from different locations around where the output video pixel is desired. Specifically, the first line from the CCD contains “red-like” colour content, alternating with the following line containing “blue-like” colour content. The third line is real-time, and the first opportunity to output properly co- sited luminance and chrominance as though the colour pixels were superimposed upon themselves, all on the second line. Pixel separator Since the colourspace converter requires the 3 most recent lines of CCD data, this block handles the shuffling of either the 2 red and 1 blue line, or 2 blue and 1 red line of data. Colour matrix converter The input to this converter is derived from the relative sums and differences of the above 3 lines of sample data, and processes them through a programmable 3x3 matrix multiplier. The output is colour-separated and calibrated RGB samples. Gamma corrector Since CRT monitors have a non-linear RGB intensity response to input signal, gamma correction must be performed in RGB space as well to prevent cross-coupling errors between luminance and chrominance. This block is a programmable 16 line-segment curve generator to provide not only gamma correction, but any arbitrary contiguous curve of positive slope, with end points at any level to adjust contrast and range. Colourspace converter Since the output of the processor is to be YUV and not RGB, a fixed-coefficient 3x3 matrix converter is used. Chrominance sub-sampling & filtering Spatial sub-sampling and filtering is performed since the output sampling format must be reduced from 4:4:4 to 4:2:2 because most video systems do not require more chrominance data for video camera input. Output formatter Devices taking digital video input such as capture, graphics and compression chips usually require the YUV to be formatted either in CCIR601 16 bit mode (YU then YV) or CCIR656 8 bit mode(U then Y then V then Y). The output mode (8 vs 16 bit) CCIR601 is pin-strap selectable. Additional control register bits may be used to swap the luma and chroma data or to swap the order of U and V data to support the video input requirements of a variety of bus master or graphics chip video interfaces without external glue logic. The polarity of VSYNC, HSYNC, VACT and HACT is also programmable. An output enable input signal may be used when “bussing” the output with other video decoders. Other useful signals such as field and colour flags are also provided. Timing diagrams illustrating the function of the video outputs at different time scales are given in figures 5 to 8. Aperture corrector Since both the luminance and chrominance are derived from spatially spread pixels and the ideal output would be as though all the pixels were superimposed upon one another, a programmable vertical and horizontal aperture correction can be applied to either “soften” or “sharpen” the image. Scene-sensing luminance and chrominance metrics There are no hard-wired closed-loop control circuits in the processor. To achieve great flexibility in control over the behavior of the camera head and processor system, a user- defined region of interest is programmed which provides statistical information about the field of video only within that region. Peak luminance, total luminance, total red chrominance and total blue chrominance are provided and updated after each field. Serial bus control To provide read-write control over the registers within the processor, a standard I2C state-machine is provided. Its address may be offset by 3 bits to preclude address conflicts. |
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