IDT71V6S75PFI datasheet(5/26 Pages) ETC2

Part #	IDT71V6S75PFI

Description	256K x 36, 512K x 18 3.3V Synchronous ZB TM SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs

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Manufacturer	ETC2 [List of Unclassifed Manufacturers]

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5 / 26 page

6.42

IDT71V65702, IDT71V65902, 256K x 36, 512K x 18, 3.3V Synchronous ZBT™ SRAMs with

3.3V or 2.5V I/O, Burst Counter, and Flow-Through Outputs

Commercial and Industrial Temperature Range

5

Recommended Operating

Temperature and Supply Voltage

Pin Configuration 256K x 36

NOTES:

1. Pins 14 and 66 do not have to be connected directly to VSS as long as the input voltage is

≤ VIL.

2. Pin 16 does not have to be connected directly to VDD as long as the input voltage is > VIH.

3. Pins 84 is reserved for a future 16M.

4. DNU = Do not use. Pins 38, 39, 42 and 43 are reserved for respective JTAG pins: TMS, TDI, TDO and TCK.

The

current die revision allows these pins to be left unconnected, tied LOW (VSS), or tied HIGH (VDD).

Top View

100 TQFP

Grade

Ambient

Temperature(1)

VSS

VDD

VDDQ

Commercial

0°C to +70°C

0V

3.3V±5%

2.5V±5%

Industrial

-40°C to +85°C

0V

3.3V±5%

2.5V±5%

5315 tbl 05

100 99 98 97 96 95 94 93 92 91 90

87 86 85 84 83 82 81

89 88

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

I/O31

I/O30

VDDQ

VSS

I/O29

I/O28

I/O27

I/O26

VSS

VDDQ

I/O25

I/O24

VSS

VDD

I/O23

I/O22

VDDQ

VSS

I/O21

I/O20

I/O19

I/O18

VSS

VDDQ

I/O17

I/O16

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

I/O14

VDDQ

VSS

I/O13

I/O12

I/O11

I/O10

VSS

VDDQ

I/O9

I/O8

VSS

VDD

I/O7

I/O6

VDDQ

VSS

I/O5

I/O4

I/O3

I/O2

VSS

VDDQ

I/O1

I/O0

5315 drw 02

VSS(1)

I/O15

I/OP3

VDD(2)

I/OP4

I/OP1

VSS(1)

I/OP2

ZZ

,

NOTES:

1. During production testing, the case temperature equals the ambient temperature.

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