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U4091BM Datasheet(PDF) 5 Page - TEMIC Semiconductors |
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U4091BM Datasheet(HTML) 5 Page - TEMIC Semiconductors |
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5 / 29 page  U4091BM Target Specification 5 (29) Rev. A1, 02-Jun-98 For line voltages below 2 V, the switches remain in quiescent state as shown in the diagram. 2. When the chip is in power-down mode (Bit LOMAKE), e.g., during pulse dialing, all internal blocks are disabled via the serial bus. In this condition, the voltage regulators and their internal bandgap are the only active blocks. 3. During ringing, the supply for the system is fed into VB via the Ringing Power Converter (RPC). Normally, the speaker amplifier in single-ended mode is used for ringing. The frequency for the melody is generated by the DTMF/Melody generator. 4. In an answering machine, the chip is powered by an external supply via Pin VB. The answering machine connections can be directly put to U4091BM. The answering machine is connected to the Pin AMREC. For the output AMREC, an AGC function is select- able via the serial bus. The output of the answering machine will be connected to the Pin AMPB, which is directly connected to the switching matrix, and thus enables the signal to be switched to every desired output. 14573 + – – + 3.3 V 5.5 V VMPS VMP 5.5 V V 470 µF 300 k Ω – + R 47 µF 220 µF 1 µF 10 Ω RSENSE R IND C VL VB Figure 3. Supply generator Ringing Power Converter (RPC) The RPC transforms the input power at VRING (high voltage/ low current) into an equivalent output power at VB (low voltage/ high current) which is capable of driving the low-ohmic loudspeaker. The input impedance at VRING is adjustable from 3 k W to 12 kW by RIMPA (ZRING = RIMPA / 100) and the efficiency of the step- down converter is approximately 65%. Ringing Frequency Detector (RFD) The U4091BM provides an output signal for the microcontroller. This output signal is always double the value of the input signal (ringing frequency). It is generated by a current comparator with hysteresis. The levels for the on-threshold are programmable in 16 steps; the off-level is fixed. Every change of the comparator output generates a high level at the interrupt output INT. The information can then be read out by means of a serial bus with either normal or fast read mode. The block RFD is always enabled. RINGTH[0:3] VRING 0 7 V 15 22 V step 1 V Clock Output Divider Adjustment The Pin OSCOUT is a clock output which is derived from the crystal oscillator. It can be used to drive a micro- controller or another remote component and thereby reduces the number of crystals required. The oscillator frequency can be divided by 1, 8, 16, 32. During power-on reset, the divider will be reset to 1 until it is changed by setting the serial bus. CLK[0:1] Divider Frequency 0 1 3.58 MHz 1 8 447 kHz 2 16 224 kHz 3 32 112 kHz Serial Bus Interface The circuit is controlled by an external microcontroller through the serial bus. The serial bus is a bi-directional system consisting of a one-directional clock line (SCL) which is always driven by the microcontroller, and a bi-directional data-signal line. It is driven by the microcontroller as well as from the U4091BM (see fig. 23). The serial bus requires external pull-up resistors as only pull-down transistors (Pin SDA) are integrated. WRITE: The data is a 12-bit word: A0 – A3: address of the destination register (0 to 15) D0 – D7: content of the register The data line must be stable when the clock is high. Data must be shifted serially. After 12 clock periods, the write indication is sent. Then, the transfer to the destination register is (internally) generated by a strobe signal transition of the data line when the clock is high. |
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