10 / 13 page
C5001
Low Skew Multiple Frequency PCI Clock Generator with EMI Reducing SSCG.
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev.2.1
6/14/1999
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571
Page 10 of 13
AC Parameters
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Input (REF) Duty Cycle
-
40
50
60
%
When external reference is used
REF input frequency
FREF
12
14.3
16
MHz
Output Duty Cycle
-
45
50
55
%
Measured at 1.5V
Skew from any output to any
output
tOFFCC
0
200
500
pS
30 pF Load, Measured at 1.5V
(all outputs fall within a 500 pSec time
window)
Jitter Cycle to Cycle
tJpp
-250
-
+250
pS
Any Output
Output Freq.
FO
30
33/66
70
MHz
At device output pins
Long term output jitter
tJlt
-500
-
+500
pS
Any output, 2 minute sample
Power up to output lock time
T∇RTL
-
-
10
mS
Measured from the point VDD reaches
3.15 Volts with a stable reference
OE Rising to Output Lock
Time
TOEL
-
-
3
mS
Measured in a stabilized environment
where OE has been previously brought
to a logic low level.
Input Capacitance
CIN
-
-
4
pF
(FBIN and REF pins)
VDD = VDDA =3.3V
±5%, TA = 0ºC to +70ºC
Buffer Characteristics (All Output Clocks)
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Pull-Up Current
IOHmin
22
-
-
mA
Vout = VDD - .5V
Pull-Up Current
IOHmax
-
-
-45
mA
Vout = 1.5V
Pull-Down Current
IOLmin
26
-
-
mA
Vout = 0.4V
Pull-Down Current
IOLmax
-
-
65
mA
Vout = 1.5V
Rise Time Min
Between 0.4 V and 2.4 V
TRmin
0.4
-
2.5
nS
30 pF Load
VDD= VDDA = 3.3V
±5%, TA = 0ºC to +70ºC
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
