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LTC6103 Datasheet(PDF) 10 Page - Linear Technology |
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LTC6103 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 16 page  LTC6103 10 6103f Error Sources The current sense system uses an amplifier and resistors to apply gain and level shift the result. The output is then dependent on the characteristics of the amplifier, such as bias current and input offset, as well as resistor matching. Ideally, the circuit output is: VV R R VR I OUT SENSE OUT IN SENSE SENSE SENSE = = • • In this case, the only error is due to resistor mismatch, which provides an error in gain only. However, offset voltage, bias current and finite gain in the amplifier cause additional errors. Output Error, EOUT, Due to the Amplifier DC Offset Voltage, VOS EV R R OUT VOS OS OUT IN () • = The DC offset voltage of the amplifier adds directly to the value of the sense voltage, VSENSE. This is the dominant error of the system and it limits the available dynamic range. The paragraph, Selection of External Current Sense Resistor provides details. Output Error, EOUT, Due to Bias Currents The bias current IB(+) flows into the positive input of the internal op amp. IB(–) flows into the negative input. EOUT(IBIAS) = ROUT(IB(+) • (RSENSE/RIN) – IB(–)) Since IB(+) ≈ IB(–) = IBIAS, if RSENSE << RIN then: EOUT(IBIAS) ≈ –ROUT • IBIAS For instance, if IBIAS is 100nA and ROUT is 1k, then the output error is 0.1mV. Output Error, EOUT, Due to PCB Trace Resistance The LTC6103 uses the +IN pin for both the positive amplifier input and the positive supply input for the amplifier. The supply current can cause an output error if trace resistance between RSENSE and +IN is significant (Figure 4). EOUT(RT_+IN) = (IS • RT/RIN) • ROUT Trace resistance to the –IN pin will increase the effective RIN value, causing a gain error. In addition, internal device resistance will add approximately 0.3 Ω to RIN. Minimizing the trace resistance is important and care should be taken in the PCB layout. Make the trace short and wide. Kelvin connection to the shunt resistor pad should be used. APPLICATIONS INFORMATION Figure 4. Error Due to PCB Trace Resistance + – +IN OUT VS IS 1/2 LTC6103 –IN RIN RT RT RSENSE V+ V– ROUT 6103 F04 LOAD ILOAD Output Error, EOUT, Due to the Finite DC Open-Loop Gain, AOL, of the LTC6103 Amplifier This error is inconsequential as the AOL of the LTC6103 is very large. Design Example: If ISENSE range = (1A to 1mA) and: V I V A OUT SENSE = 3 1 |
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