Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

AS4C4M4E1Q Datasheet(PDF) 9 Page - Alliance Semiconductor Corporation

Part # AS4C4M4E1Q
Description  4M X 4 CMOS Quad CAS DRAM (EDO) family
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C4M4E1Q Datasheet(HTML) 9 Page - Alliance Semiconductor Corporation

Back Button AS4C4M4E1Q Datasheet HTML 5Page - Alliance Semiconductor Corporation AS4C4M4E1Q Datasheet HTML 6Page - Alliance Semiconductor Corporation AS4C4M4E1Q Datasheet HTML 7Page - Alliance Semiconductor Corporation AS4C4M4E1Q Datasheet HTML 8Page - Alliance Semiconductor Corporation AS4C4M4E1Q Datasheet HTML 9Page - Alliance Semiconductor Corporation AS4C4M4E1Q Datasheet HTML 10Page - Alliance Semiconductor Corporation AS4C4M4E1Q Datasheet HTML 11Page - Alliance Semiconductor Corporation AS4C4M4E1Q Datasheet HTML 12Page - Alliance Semiconductor Corporation AS4C4M4E1Q Datasheet HTML 13Page - Alliance Semiconductor Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 16 page
background image
®
AS4C4M4EOQ
AS4C4M4E1Q
3/22/01; v.1.0
Alliance Semiconductor
P. 9 of 16
Notes
1ICC1, ICC3, ICC4, and ICC6 are dependent on frequency.
2ICC1 and ICC4 depend on output loading. Specified values are obtained with the output open.
3
An initial pause of 200 µs is required after power-up followed by any 8 RAS cycles before proper device operation is achieved. In the case of an internal
refresh counter, a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS cycles are required. 8 initialization cycles are required after
extended periods of bias without clocks (greater than 8 ms).
4
AC Characteristics assume tT = 2 ns. All AC parameters are measured with a load equivalent to two TTL loads and 100 pF, VIL (min) GND and VIH
(max)
V
CC.
5VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Transition times are measured between VIH and VIL.
6
Operation within the tRCD (max) limit insures that tRAC (max) can be met. tRCD (max) is specified as a reference point only. If tRCD is greater than the
specified tRCD (max) limit, then access time is controlled exclusively by tCAC.
7
Operation within the tRAD (max) limit insures that tRAC (max) can be met. tRAD (max) is specified as a reference point only. If tRAD is greater than the
specified tRAD (max) limit, then access time is controlled exclusively by tAA.
8
Assumes three state test load (5 pF and a 380
Thevenin equivalent).
9Either tRCH or tRRH must be satisfied for a read cycle.
10 tOFF (max) defines the time at which the output achieves the open circuit condition; it is not referenced to output voltage levels. tOFF is referenced from
rising edge of RAS or CAS, whichever occurs last.
11 tWCS, tWCH, tRWD, tCWD and tAWD are not restrictive operating parameters. They are included in the datasheet as electrical characteristics only.
If tWS tWS (min) and tWH tWH (min), the cycle is an early write cycle and data out pins will remain open circuit, high impedance, throughout the
cycle. If tRWD tRWD (min), tCWD tCWD (min) and tAWD tAWD (min), the cycle is a read-write cycle and the data out will contain data read from the
selected cell. If neither of the above conditions is satisfied, the condition of the data out at access time is indeterminate.
12 These parameters are referenced to CAS leading edge in early write cycles and to WE leading edge in read-write cycles.
13 Access time is determined by the longest of tCAA or tCAC or tCPA
14 tASC tCP to achieve tPC (min) and tCPA (max) values.
15 These parameters are sampled and not 100% tested.
16 These characteristics apply to AS4C4M4EOQ 5V devices.
17 These characteristics apply to AS4C4M4E1Q 5V devices.
AC test conditions
Key to switching waveforms
- Access times are measured with output reference levels of VOH =
2.4V and VOL = 0.4V,
VIH = 2.4V and VIL = 0.8V
- Input rise and fall times: 2 ns
100 pF*
R2 = 295
R1 = 828
Dout
GND
+5V
Figure A: Equivalent output load
*including scope
and jig capacitance
*including scope
and jig capacitance
50 pF*
R2 = 295
R1 = 828
Dout
GND
+3.3V
Figure B: Equivalent output load
(AS4C4M4E0/AS4C4M4E1)
(AS4C4M4E0/AS4C4M4E1)
Undefined output/don’t care
Falling input
Rising input


Similar Part No. - AS4C4M4E1Q

ManufacturerPart #DatasheetDescription
logo
Austin Semiconductor
AS4C4M4 AUSTIN-AS4C4M4 Datasheet
2Mb / 19P
   4M x 4 CMOS DRAM WITH FAST PAGE MODE, 5 VOLT
AS4C4M4DG-6/IT AUSTIN-AS4C4M4DG-6/IT Datasheet
2Mb / 19P
   4M x 4 CMOS DRAM WITH FAST PAGE MODE, 5 VOLT
AS4C4M4DG-6/XT AUSTIN-AS4C4M4DG-6/XT Datasheet
2Mb / 19P
   4M x 4 CMOS DRAM WITH FAST PAGE MODE, 5 VOLT
AS4C4M4DG-7/IT AUSTIN-AS4C4M4DG-7/IT Datasheet
2Mb / 19P
   4M x 4 CMOS DRAM WITH FAST PAGE MODE, 5 VOLT
AS4C4M4DG-7/XT AUSTIN-AS4C4M4DG-7/XT Datasheet
2Mb / 19P
   4M x 4 CMOS DRAM WITH FAST PAGE MODE, 5 VOLT
More results

Similar Description - AS4C4M4E1Q

ManufacturerPart #DatasheetDescription
logo
Samsung semiconductor
KM44C4005C SAMSUNG-KM44C4005C Datasheet
378Kb / 20P
   4M x 4Bit CMOS Quad CAS DRAM with Extended Data Out
KM44C4003C SAMSUNG-KM44C4003C Datasheet
376Kb / 20P
   4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode
KMM5361205C2W SAMSUNG-KMM5361205C2W Datasheet
289Kb / 17P
   1M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh
KMM5362205C2W SAMSUNG-KMM5362205C2W Datasheet
296Kb / 17P
   2M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh
logo
Hynix Semiconductor
HY51VS17403HG HYNIX-HY51VS17403HG Datasheet
96Kb / 11P
   4M x 4Bit EDO DRAM
HY51VS65163HG HYNIX-HY51VS65163HG Datasheet
96Kb / 11P
   4M x 16Bit EDO DRAM
logo
Siemens Semiconductor G...
HYM64V4005GU-50 SIEMENS-HYM64V4005GU-50 Datasheet
95Kb / 17P
   3.3V 4M x 64-Bit EDO-DRAM Module 3.3V 4M x 72-Bit EDO-DRAM Module
HYM324025S SIEMENS-HYM324025S Datasheet
52Kb / 10P
   4M x 32-Bit EDO-DRAM Module
HYM364035S SIEMENS-HYM364035S Datasheet
476Kb / 10P
   4M x 36-Bit EDO-DRAM Module
HYM72V4005GS-50- SIEMENS-HYM72V4005GS-50- Datasheet
70Kb / 11P
   4M x 72-Bit EDO-DRAM Module
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com