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MGA-71543-BLK Datasheet(PDF) 2 Page - Agilent(Hewlett-Packard) |
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MGA-71543-BLK Datasheet(HTML) 2 Page - Agilent(Hewlett-Packard) |
2 / 24 page 2 Functional Block Diagram Simplified Schematic MGA-71543 Absolute Maximum Ratings[1] Symbol Parameter Units Absolute Operation Maximum Maximum Vd Maximum Input to Output Voltage[4] V 5.5 4.2 Vc Maximum Input to Ground DC Voltage[4] V +.3 +.1 -5.5 -4.2 Id Supply Current mA 60 50 Pd Power Dissipation[2] mW 240 200 Pin CW RF Input Power dBm +15 +10 Tj Junction Temperature °C 170 150 TSTG Storage Temperature °C -65 to +150 -40 to +85 Thermal Resistance:[2,3] θjc = 240°C/W Notes: 1. Operation of this device in excess of any of these limits may cause permanent damage. 2. Ground lead temperature at 25 °C. 3. Thermal resistance measured by 150 °C Liquid Crystal Measurement method. 4. Maximum rating assumes other parameters are at DC quiescent conditions. Product Consistency Distribution Charts [5,6] Notes: 5. Distribution data sample size is 450 samples taken from 9 different wafers. Future wafers allocated to this product may have nominal values anywhere within the upper and lower specification limits. 6. Measurements made on production test board, Figure 4. This circuit represents a trade-off between an optimal noise match and a realizable match based on production test requirements at 10 mA bias current. RF OUT Switch & Bias RF IN RF Gnd RF Gnd & Vs Output & Vd Control + + – – Gain FET Input & Vref GAIN (dB) Figure 1. Gain @ 2 GHz, 3V, 10 mA. LSL = 14.4, Nominal = 15.9, USL = 17.4 14.4 15.4 16.4 17.4 150 120 90 60 30 0 +3 Std Cpk = 2.00 Std = 0.24 -3 Std IIP3 (dBm) Figure 2. IIP3 @ 2 GHz, 3V, 10 mA. LSL = 1.0, Nominal = 3.0, USL = 8.0 13 4 5 26 78 150 120 90 60 30 0 +3 Std Cpk = 1.16 Std = 0.96 -3 Std NF (dB) Figure 3. NF @ 2 GHz, 3V, 10 mA. LSL = 0.85, Nominal = 1.08, USL = 1.45 0.85 1.05 1.15 1.25 0.95 1.35 1.45 150 120 90 60 30 0 +3 Std Cpk = 2.33 Std = 0.02 -3 Std Excess circuit losses have been de- embedded from actual measurements. Performance may be optimized for different bias conditions and applications. Consult Application Note for details. Input Rbias Vd control 1.5 nH 2.7 nH Output Evaluation Test Circuit (single positive bias) |
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