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DS8832N Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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DS8832N Datasheet(HTML) 3 Page - National Semiconductor (TI) |
3 / 11 page Absolute Maximum Ratings (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Output Voltage 5.5V Storage Temperature Range −65˚C to +150˚C Lead Temperature (Soldering, 4 sec.) 260˚C Maximum Power Dissipation (Note 1) at 25˚C Cavity Package 1433 mW Molded Package 1362 mW Operating Conditions Min Max Units Supply Voltage (V CC) DS7831 4.5 5.5 V DS8831/DS8832 4.75 5.25 V Temperature (T A) DS7831 −55 +125 ˚C DS8832 0 +70 ˚C Note 1: Derate cavity package 9.6 mW/˚C above 25˚C; derate molded pack- age 10.9 mW/˚C above 25˚C. Electrical Characteristics (Notes 3, 4) Symbol Parameter Conditions Min Typ Max Units V IH Logical “1” Input Voltage V CC = Min 2.0 V V IL Logical “0” Input Voltage V CC = Min 0.8 V V OH Logical “1” Output Voltage DS7831 I O = −40 mA 1.8 2.3 V V CC = Min I O = −2 mA 2.4 2.7 V DS8832 I O = −40 mA 1.8 2.5 V I O = −5.2 mA 2.4 2.9 V V OL Logical “0” Output Voltage DS7831 I O = 40 mA 0.29 0.50 V V CC = Min I O = 32 mA 0.40 V DS8832 I O = 40 mA 0.29 0.50 V I O = 32 mA 0.40 V I IH Logical “1” Input Current V CC = Max DS7831, V IN = 5.5V 1 mA DS8832, V IN = 2.4V 40 µA I IL Logical “0” Input Current V CC = Max, VIN = 0.4V −1.0 −1.6 mA I OD Output Disable Current V CC = Max, VO = 2.4V or 0.4V −40 40 µA I SC Output Short Circuit Current V CC = Max, (Note 5) −40 −100 −120 mA I CC Supply Current V CC = Max in TRI-STATE 65 90 mA V CLI Input Diode Clamp Voltage V CC = 5.0V, TA = 25˚C, IIN = −12 mA −1.5 V V CLO Output Diode Clamp Voltage V CC = 5.0V, I OUT = −12 mA DS7831 −1.5 V T A = 25˚C DS8832 I OUT = 12 mA DS7831 V CC + 1.5 V Switching Characteristics T A = 25˚C, VCC = 5V, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units t pd0 Propagation Delay to a Logical “0” from Inputs A1, A2, B1, B2 13 25 ns Differential Single-ended Mode Control to Outputs t pd1 Propagation Delay to a Logical “1” from Inputs A1, A2, B1, B2 13 25 ns Differential Single-ended Mode Control to Outputs t 1H Delay from Disable Inputs to High Impedance State (from Logical “1” (See Figure 4 and Figure 5 ) 6 12 ns Level) t 0H Delay from Disable Inputs to High Impedance State (from Logical “0” Level) 14 22 ns www.national.com 3 |
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