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MM74HCT14MTC Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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MM74HCT14MTC Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page © 2005 Fairchild Semiconductor Corporation DS500059 www.fairchildsemi.com September 1983 Revised January 2005 MM74HCT14 Hex Inverting Schmitt Trigger General Description The MM74HCT14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads. The 74HCT logic family is functionally and pinout compati- ble with the standard 74LS logic family. All inputs are pro- tected from damage due to static discharge by internal diode clamps to VCC and ground. Features s Typical propagation delay: 13 ns s Wide power supply range: 2–6V s Low quiescent current: 10 µA maximum s Low input current: 1 µA maximum s Fanout of 10 LS-TTL loads s Typical hysteresis voltage: 0.9V at VCC = 4.5V s TTL, LS pin-out and input threshold compatible Ordering Codes: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View Schematic Diagram Order Number Package Package Description Number MM74HCT14M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HCT14MX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HCT14SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HCT14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HCT14N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide |
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