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ZL30105QDG Datasheet(PDF) 6 Page - Zarlink Semiconductor Inc

Part # ZL30105QDG
Description  T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

ZL30105QDG Datasheet(HTML) 6 Page - Zarlink Semiconductor Inc

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ZL30105
Data Sheet
6
Zarlink Semiconductor Inc.
1.0
Change Summary
Changes from July 2005 Issue to November 2005 Issue. Page, section, figure and table numbers refer to this
current issue.
Changes from October 2004 Issue to July 2005 Issue. Page, section, figure and table numbers refer to this current
issue.
Changes from June 2004 Issue to October 2004 Issue. Page, section, figure and table numbers refer to this current
issue.
Page
Item
Change
1
Features
Changed description for hitless reference switching.
33
Section 6.1
Removed power supply decoupling circuit and included
reference to synchronizer power supply decoupling application
note.
Page
Item
Change
9RST pin
Specified clock and frame pulse outputs forced to high
impedance
38
Table “DC Electrical Characteristics*“
Corrected Schmitt trigger levels
Page
Item
Change
1
Text
Jitter changed to 24 ps from 20 ps
7
Figure 2
Added note specifying not e-Pad
35
Section 6.4
Corrected time-constant of example reset circuit
38
Table “Absolute Maximum Ratings*“
Corrected package power rating
38
Table “DC Electrical Characteristics*“
Corrected current consumption
Corrected Schmitt trigger Vt- levels
Corrected output voltage note to reflect two pad strengths
38
Section 7.1
Pulse widths corrected.
41
Table “AC Electrical Characteristics* -
Input to output timing for REF0, REF1
and REF2 references when
TIE_CLR = 0 (see Figure 26).“
Updated Min. Max. values.
48 -
50
Section 7.2
Changed jitter numbers


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