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ZL30410 Datasheet(PDF) 7 Page - Zarlink Semiconductor Inc |
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ZL30410 Datasheet(HTML) 7 Page - Zarlink Semiconductor Inc |
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7 / 57 page  ZL30407 Data Sheet 7 Zarlink Semiconductor Inc. Pin Description Pin # Name Description 1IC Internal Connection. Leave unconnected. 2-5 A1-A4 Address 1 to 4 (5 V tolerant input). Address inputs for the parallel processor interface. Connect to ground in Hardware Control. 6GND Ground. Negative power supply. 7-8 A5-A6 Address 5 to 6 (5 V tolerant input). Address inputs for the parallel processor interface. Connect to ground in Hardware Control. 9FCS Filter Characteristic Select (Input). In Hardware Control, FCS selects the filtering characteristics of the ZL30407. Set this pin high to have a loop filter corner frequency of 0.1 Hz and limit the phase slope to 885 ns/sec. Set this pin low to have corner frequency of 1.5 Hz and limit the phase slope to 41 ns per 1.326 ms. Connect to ground in Software Control. This pin is internally pulled down to GND. 10 VDD Positive Power Supply 11 GND Ground 12 F16o Frame Pulse ST-BUS 8.192 Mbps (CMOS tristate output). This is an 8 kHz, 61 ns wide, active low framing pulse, which marks beginning of a ST-BUS frame. This frame pulse is typically used for ST-BUS operation at 8.192 Mbps. 13 C16o Clock 16.384 MHz (CMOS tristate output). This clock is used for ST-BUS operation at 8.192 Mbps. 14 C8o Clock 8.192 MHz (CMOS tristate output). This clock is used for ST-BUS operation at 8.192 Mbps. 15 C4o Clock 4.096 MHz (CMOS tristate output). This clock is used for ST-BUS operation at 2.048 Mbps. 16 C2o Clock 2.048 MHz (CMOS tristate output). This clock is used for ST-BUS operation at 2.048 Mbps. 17 F0o Frame Pulse ST-BUS 2.048 Mbps (CMOS tristate output). This is an 8 kHz, 244 ns, active low framing pulse, which marks the beginning of a ST-BUS frame. This is typically used for ST-BUS operation at 2.048 Mbps and 4.096 Mbps. 18 MS1 Mode Select 1 (Input). The MS1 and MS2 pins select the ZL30407 mode of operation (Normal, Holdover or Free-run), see Table 2 on page 22 for details. The logic level at this input is sampled by the rising edge of the F8o frame pulse. Connect to ground in Software Control. 19 MS2 Mode Select 2 (Input). The MS2 and MS1 pins select the ZL30407 mode of operation (Normal, Holdover or Free-run), see Table 2 on page 22 for details. The logic level at this input is sampled by the rising edge of the F8o frame pulse. Connect to ground in Software Control. |
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