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TAS5122DCARG4 Datasheet(PDF) 3 Page - Texas Instruments |
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TAS5122DCARG4 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 22 page TAS5122 SLES088E – AUGUST 2003 – REVISED DECEMBER 2004 www.ti.com 3 Terminal Functions TERMINAL FUNCTION(1) DESCRIPTION NAME NO. FUNCTION(1) DESCRIPTION BST_A 54 P HS bootstrap supply (BST), external capacitor to OUT_A required BST_B 43 P HS bootstrap supply (BST), external capacitor to OUT_B required BST_C 42 P HS bootstrap supply (BST), external capacitor to OUT_C required BST_D 31 P HS bootstrap supply (BST), external capacitor to OUT_D required DGND 6 P Digital I/O reference ground DREG 13 P Digital supply voltage regulator decoupling pin, capacitor connected to GND DREG_RTN 17 P Digital supply voltage regulator decoupling return pin DVDD 4 P I/O reference supply input (3.3 V) GND 1, 2, 5, 7, 27, 28, 29, 36, 37, 48, 49, 56 P Power ground (I/O reference ground – pin 22) GREG 3, 26 P Gate drive voltage regulator decoupling pin, capacitor to GND GVDD 30, 55 P Voltage supply to on−chip gate drive and digital supply voltage regulators M1 14 I Mode selection pin M2 15 I Mode selection pin M3 16 I Mode selection pin OTW 25 O Overtemperature warning output, open drain with internal pullup OUT_A 50, 51 O Output, half-bridge A OUT_B 46, 47 O Output, half-bridge B OUT_C 38, 39 O Output, half-bridge C OUT_D 34, 35 O Output, half-bridge D PVDD_A 52, 53 P Power supply input for half-bridge A PVDD_B 44, 45 P Power supply input for half-bridge B PVDD_C 40, 41 P Power supply input for half-bridge C PVDD_D 32, 33 P Power supply input for half-bridge D PWM_AM 9 I Input signal (negative), half-bridge A PWM_AP 8 I Input signal (positive), half-bridge A PWM_BM 11 I Input signal (negative), half-bridge B PWM_BP 12 I Input signal (positive), half-bridge B PWM_CM 19 I Input signal (negative), half-bridge C PWM_CP 18 I Input signal (positive), half-bridge C PWM_DM 21 I Input signal (negative), half-bridge D PWM_DP 22 I Input signal (positive), half-bridge D RESET_AB 10 I Reset signal, active low RESET_CD 20 I Reset signal, active low SD_AB 23 O Shutdown signal for half-bridges A and B SD_CD 24 O Shutdown signal for half-bridges C and D (1) I = input, O = output, P = power |
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