ZL40812

Data Sheet

2

Zarlink Semiconductor Inc.

Pin Connection - Top View

Application Configuration

Figure 2 shows a recommended application configuration. This example shows the devices set up for single ended

operation.

Figure 2 - Recommended Circuit Configuration

The above circuit diagram shows some components in dotted lines. These are optional in many applications.

1. C1 (10 µF) and C2 (10 nF) power supply decoupling capacitors may be available on the board already.

2. R3 (100 Ohm) and C8 (10 nF) can be included if further power supply decoupling is required for the first stage

biasing circuit. This may optimise the noise and jitter performance. The values are suggestions and may have

to be modified if the existing supplies are particularly noisy.

3. R1 (50 Ohm), in series with C5 (100 pF), may reduce feedthrough of the input signal to the output.

4. R2 (50 Ohm) and C7 (10 nF) will help to balance the current drawn from the power supply and may reduce volt-

age transients on the power supply line

Vcc INPUT

INPUT

INPUT B

GND

Vcc OUTPUT

OUTPUT

OUTPUT B

GND

1

2

3

4

5

6

7

8

SOIC (N) E-Pad

1

8

7

2

3

6

5

4

C2:10nF

C4:100pf

C5:100pf

C6:10nF

C7:10nF

Vcc 5V

Example Configuration for Single ended operation

C1:10uF

R2:50ohm

R1:50ohm

C3:100pF

R3:100ohm

C8:10nF