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ZL50012GDG2 Datasheet(PDF) 6 Page - Zarlink Semiconductor Inc |
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ZL50012GDG2 Datasheet(HTML) 6 Page - Zarlink Semiconductor Inc |
6 / 66 page ZL50012 Data Sheet 9 Zarlink Semiconductor Inc. Changes Summary The following table captures the changes from the July 2004 issue. Page Item Change 18 2.1.4, “Improved Input Jitter Tolerance with Frame Boundary Determinator“ • Added a new section to describe the improved input jitter tolerance with the frame boundary determinator. 37 Table 15 -, “Control Register (CR) Bits“ - bits , “FBDMODE“ and , “FBDEN“ • Renamed bit 15 from Unused to FBDMODE and added description to clarify the frame boundary determinator operation. • Clarified FBDEN description. |
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