ZL49010/11, ZL49020/21, ZL49030/31

Data Sheet

9

Zarlink Semiconductor Inc.

‡ Typical figures are at 25

* Test Conditions

1. dBm refers to a reference power of 1 mW delivered into a 600 ohms load.

2. Data sequence consists of all DTMF digits.

3. Tone on = 40 ms, tone off = 40 ms.

4. Signal condition consists of nominal DTMF frequencies.

5. Both tones in composite signal have an equal amplitude.

6. Tone pair is deviated by

7. Bandwidth limited (0-3 kHz) Gaussian noise.

8. Precise dial tone frequencies are 350 Hz and 440 Hz (

9. Referenced to lowest level frequency component in DTMF signal.

10. Referenced to the minimum valid accept level.

11. Both tones must be within valid input signal range.

12. Internal guard time for ZL490x1 = 20 ms.

13. Timing parameters are measured with 70 pF load at SD output.

14. Time duration between PWDN pin changes from ‘1‘ to ‘0‘ and ESt/DStD becomes active.

15. Guaranteed by design and characterization. Not subject to production testing.

16. Value measured with an applied tone of 450 Hz.

stated.

Characteristics

Sym.

Min.

Max.

Units

Test Conditions*

1

Valid input signal level

(each tone of composite signal)

-50

2.45

0

775

dBm

1,2,3,5,6,12

2

Positive twist accept

8

dB

1,2,3,4,11,12,15

3

Negative twist accept

8

dB

1,2,3,4,11,12,15

4

Frequency deviation accept

1,2,3,5,12

5

Frequency deviation reject

1,2,3,5,12,15

6

Third tone tolerance

-16

dB

1,2,3,4,5,12

7

Noise tolerance

-12

dB

7,9,12

8

Dial tone tolerance

+15

dB

8,10,12

9

Supervisory tones detect level

(Total power)

-35

dBm

16

10

Supervisory tones reject level

-50

dBm

16

11

Energy detector attack time

1.0

6.5

ms

16

12

Energy detector decay time

325

ms

16

13a

13b

Powerdown time

Powerup time

10

30

50

ms

ms

ms

µA

ZL49010/ZL49030

ZL49011/ZL49031

Note 14

14

Tone present detect time (ESt

logic output)

3

13

20

ms

ZL490x0

15

Tone absent detect time (ESt

logic output)

3

15

ms

ZL490x0

16

Tone duration accept

(DStD logic output)

40

ms

ZL490x1

17

Tone duration reject

(DStD logic output)

20

ms

ZL490x1

18

Interdigit pause accept (DStD

logic output)

40

ms

ZL490x1

19

Interdigit pause reject (DStD logic

output)

20

ms

ZL490x1

20

Data shift rate 40-60% duty cycle

1.0

3.0

MHz

13,15

21

Propagation delay

(ACK to Data Bit)

100

140

ns

13,15

22

Data hold time (ACK to SD)

30

50

ns

13,15