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TAS5504APAGRG4 Datasheet(PDF) 5 Page - Texas Instruments |
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TAS5504APAGRG4 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 97 page  www.ti.com TAS5504A 4-Channel Digital Audio PWM Processor SLES169 – FEBRUARY 2006 6.11 Modulation Index Limit Register (0x16) ................................................................................. 75 6.12 Bank Switching Command Register (0x40) ............................................................................ 76 6.13 Input Mixer Registers (0x41, 0x42, 0x47, 0x48, Channels 1–4) ..................................................... 77 6.14 Bass Management Registers (0x49–0x50) ............................................................................. 78 6.15 Biquad Filter Registers (0x51–0x88) ..................................................................................... 79 6.16 Bass and Treble Bypass Register (0x89–0x90, Channels 1–4) ..................................................... 79 6.17 Loudness Registers (0x91–0x95) ........................................................................................ 80 6.18 DRC1 Control (0x96, Channels 1–3) .................................................................................... 80 6.19 DRC2 Control (0x97, Channel 4) ......................................................................................... 81 6.20 DRC1 Data Registers (0x98–0x9C) ..................................................................................... 81 6.21 DRC2 Data Registers (0x9D–0xA1) ..................................................................................... 82 6.22 DRC Bypass Registers (0xA2, 0xA3, 0xA8, 0xA9) .................................................................... 82 6.23 4 × 2 Output Mixer Registers (0xAA and 0xAB)........................................................................ 83 6.24 4 × 3 Output Mixer Registers (0xB0–0xB1)............................................................................. 84 6.25 PSVC Volume Biquad Register (0xCF) ................................................................................. 85 6.26 Volume, Treble, and Bass Slew Rates Register (0xD0) .............................................................. 86 6.27 Volume Registers (0xD1, 0xD2, 0xD7, and 0xD8) ..................................................................... 86 6.28 Bass Filter Set Register (0xDA) ......................................................................................... 88 6.29 Bass Filter Index Register (0xDB) ....................................................................................... 89 6.30 Treble Filter Set Register (0xDC) ........................................................................................ 90 6.31 Treble Filter Index (0xDD) ................................................................................................. 91 6.32 AM Mode Register (0xDE) ................................................................................................ 92 6.33 PSVC Range Register (0xDF) ............................................................................................ 93 6.34 General Control Register (0xE0) ......................................................................................... 93 6.35 Incremental Multiple-Write Append Register (0xFE) ................................................................... 93 7 TAS5504A Example Application Schematic ........................................................................... 93 Contents 5 |
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