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A3987SLP-T Datasheet(PDF) 5 Page - Allegro MicroSystems |
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A3987SLP-T Datasheet(HTML) 5 Page - Allegro MicroSystems |
5 / 13 page DMOS Microstepping Driver with Translator A3987 5 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Figure 1. Logic Interface Timing Diagram STEP t A t D t C MS1, MS2, RESET/SLEEP, or DIR t B Time Duration Symbol Typ. Unit STEP minimum, HIGH pulse width tA 1 μs STEP minimum, LOW pulse width tB 1 μs Setup time, input change to STEP tC 200 ns Hold time, input change to STEP tD 200 ns ELECTRICAL CHARACTERISTICS1 (continued) valid at TA = 25°C, VBB = 50 V, unless noted otherwise Characteristics Symbol Test Conditions Min. Typ.2 Max. Units Protection Circuitry Overcurrent Protection Threshold4 Iocpst 2– – A Overcurrent Blanking tocp 13 μs Thermal Shutdown Temperature TTSD – 165 – °C Thermal Shutdown Hysteresis TTSDhys –15 – °C 1Negative current is defined as coming out of (sourcing) the specified device pin. 2Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for indi- vidual units, within the specified maximum and minimum limits. 3VERR = [(VREF/8) – VSENSE] /(VREF/8). 4OCP is tested at TA = 25°C in a restricted range and guaranteed by characterization. |
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