Signal description

M24512-W, M24512-R, M24256-BW, M24256-BR

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2

Signal description

2.1

Serial Clock (SCL)

This input signal is used to strobe all data in and out of the device. In applications where this

signal is used by slave devices to synchronize the bus to a slower clock, the bus master

must have an open drain output, and a pull-up resistor must be connected from Serial Clock

most applications, though, this method of synchronization is not employed, and so the pull-

up resistor is not necessary, provided that the bus master has a push-pull (rather than open

drain) output.

2.2

Serial Data (SDA)

This bi-directional signal is used to transfer data in or out of the device. It is an open drain

output that may be wire-OR’ed with other open drain or open collector signals on the bus. A

the value of the pull-up resistor can be calculated).

2.3

Chip Enable (E0, E1, E2)

These input signals are used to set the value that is to be looked for on the three least

significant bits (b3, b2, b1) of the 7-bit Device Select Code. These inputs must be tied to

inputs are read as Low (0,0,0).

Figure 3.

Device Select Code

2.4

Write Control (WC)

This input signal is useful for protecting the entire contents of the memory from inadvertent

write operations. Write operations are disabled to the entire memory array when Write

Write operations are allowed.

When Write Control (WC) is driven High, Device Select and Address bytes are

acknowledged, Data bytes are not acknowledged.

Ai12806

VCC

M24xxx

VSS

Ei

VCC

M24xxx

VSS

Ei