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SN65HVD251D Datasheet(PDF) 5 Page - Texas Instruments |
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SN65HVD251D Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 19 page  www.ti.com RECEIVER SWITCHING CHARACTERISTICS VREF-PIN CHARACTERISTICS DEVICE SWITCHING CHARACTERISTICS PARAMETER MEASUREMENT INFORMATION VO(CANH) + VO(CANL) 2 D + _ Rs II IO(CANH) IO(CANL) VO(CANL) VO(CANH) 60 W + 1% VOD VOC VI IIRs VI(Rs) SN65HVD251 SLLS545C – NOVEMBER 2002 – REVISED SEPTEMBER 2005 over recommended operating conditions (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tpLH Propagation delay time, low-to-high-level output 35 50 tpHL Propagation delay time, high-to-low-level output 35 50 tsk(p) Pulse skew (|tpHL - tpLH|) Figure 6 20 ns tr Output signal rise time 2 4 tf Output signal fall time 2 4 tp(sb) Propagation delay time in standby Figure 12, Rs at VCC 500 over recommended operating conditions (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT -5 µA < IO < 5 µA 0.45 VCC 0.55 VCC VO Reference output voltage V -50 µA < IO < 50 µA 0.4 VCC 0.6 VCC over recommended operating conditions (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Figure 10, Rs at 0 V 60 100 Total loop delay, driver input to receiver tloop1 Figure 10, Rs with 10 k Ω to ground 100 150 ns output, recessive to dominant Figure 10, Rs with 100 k Ω to ground 440 800 Figure 10, Rs at 0 V 115 150 Total loop delay, driver input to receiver tloop2 Figure 10, Rs with 10 k Ω to ground 235 290 ns output, dominant to recessive Figure 10, Rs with 100 k Ω to ground 1070 1450 tloop2 Total loop delay, driver input to receiver Figure 10, Rs at 0 V, VCC from 4.5 V to 5.1 105 145 ns output, dominant to recessive V, Figure 1. Driver Voltage, Current, and Test Definition 5 |
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