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LNBP21D2-TR Datasheet(PDF) 8 Page - STMicroelectronics |
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LNBP21D2-TR Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 24 page  LNBP21 8/24 Values are typical unless otherwise specified POWER-ON I2C INTERFACE RESET The I2C interface built in the LNBP21 is automatically reset at power-on. As long as the VCC stays be-low the UnderVoltage Lockout threshold (6.7V typ.), the interface will not respond to any I2C command and the System Register (SR) is initialized to all zeroes, thus keeping the power blocks disabled. Once the VCC rises above 7.3V, the I2C interface becomes operative and the SR can be configured by the main µP. This is due to About 500mV of hysteresis provided in the UVL threshold to avoid false retriggering of the Power-On reset circuit. DiSEqCTM IMPLEMENTATION The LNBP21 helps the system designer to implement the bidirectional (2.x) DiSEqC protocol by allowing an easy PWK modulation/ demodulation of the 22KHz carrier. The PWK data are exchanged between the LNBP21 and the main µP using logic levels that are compatible with both 3.3 and 5V microcontrollers. This data exchange is made through two dedicated pins, DSQIN and DSQOUT, in order to maintain the timing relationships between the PWK data and the PWK modulation as accurate as possible. These two pins should be directly connected to two I/O pins of the µP, thus leaving to the resident firmware the task of encoding and decoding the PWK data in accordance to the DiSEqC protocol. Full compliance of the system to the specification is thus not implied by the bare use of the LNBP21. The system designer should also take in consideration the bus hardware requirements, that include the source impedance of the Master Transmitter measured at 22KHz. To limit the attenuation at carrier frequency, this impedance has to be 15ohm at 22KHz, dropping to zero ohm at DC to allow the power flow towards the peripherals. This can be simply accomplished by the LR termination put on the OUT pin of the LNBP, as shown in the Typical Application Circuit on page 5. Unidirectional (1.x) DiSEqC and non-DiSEqC systems normally don't need this termination, and the OUT pin can be directly connected to the LNB supply port of the Tuner. There is also no need of Tone Decoding, thus, it is recommended to connect the DETIN and DSQOUT pins to ground to avoid EMI. ADDRESS PIN Connecting this pin to GND the Chip I2C interface address is 0001000, but, it is possible to choice among 4 different addresses simply setting this pin at 4 fixed voltage levels (see table on page 10). PCL ISEL TEN LLC VSEL EN OTF OLF Function These bits are read exactly the same as they were left after last write operation 0 TJ<140°C, normal operation 1 TJ>150°C, power block disabled, Loopthrough switch open 0 IOUT<IOMAX, normal operation 1 IOUT>IOMAX, overload protection triggered |
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