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DEVICE INFORMATION

1

2

3

4

5

10

9

8

7

6

IFB1

Iset1

SEL1

SEL2

Vin

IFB2

Iset2

GND

Iout

SW

10 pin 3*3 mm QFN PACKAGE

(TOP VIEW)

Exposed

Thermal

Pad

TPS61150, TPS61151

SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

OVP

PACKAGE

(Typ.)

MARKING

–40 to 85

°C

TPS61150DRCR

28 V

BCQ

–40 to 85

°C

TPS61151DRCR

22 V

BRH

–40 to 85

°C

TPS61150DRCT

28 V

BCQ

–40 to 85

°C

TPS61151DRCT

22 V

BRH

(1)

For the most current package and ordering information, see the Package Option Addendum at the end

of this document, or see the TI Web site at www.ti.com.

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

NO.

The input pin to the IC. It provides the current to the boost power stage, and also powers the

Vin

5

I

IC circuit. When Vin is below the undervoltage lockout threshold, the IC turns off and disables

outputs; thereby disconnecting the WLEDs from the input.

GND

8

O

The ground of the IC. Connect the input and output capacitors very close to this pin.

SW

6

I

This is the switching node of the IC.

The output of the constant current supply. It is directly connected to the boost converter

Iout

7

O

output.

The return path for the Iout regulation. Current regulator is connected to this pin, and it can

IFB1, IFB2

10

I

be disabled to open the current path.

ISET1,

2

Output current programming pin. The resistor connected to the pin programs its

I

ISET2

9

corresponding output current.

SEL1,

3

I

Mode selection pins. See Table 1 for details.

SEL2

4

The thermal pad should be soldered to the analog ground. If possible, use thermal via to

Thermal Pal

connect to ground plane for ideal power dissipation.

Table 1. TPS61150/1 Mode Selection

SEL1

SEL2

IFB1

IFB2

H

L

Enable

Disable

L

H

Disable

Enable

H

H

Enable

Enable

L

L

IC Shutdown

2

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