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FEATURES

DESCRIPTION

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1B

1A

S0

1DE

S1

2A

2B

GND

1Y

1Z

2DE

2Z

2Y

GND

logic diagram (positive logic)

_

+

_

+

1A

1Y

1B

1DE

2DE

S0

S1

2A

2B

1Z

2Y

2Z

0

1

0

1

2

1

4

12

3

5

6

7

14

13

10

11

S1

0

0

1

1

S0

0

1

0

1

1Y/1Z

1A/1B

2A/2B

1A/1B

2A/2B

2Y/2Z

1A/1B

2A/2B

2A/2B

1A/1B

Splitter

Splitter

Router

Router

INPUT

OUTPUT

FUNCTION

MUX TRUTH TABLE

SN65LVDS22D and SN65LVDS22PW (Marked as LVDS22)

SN65LVDM22D and SN65LVDM22PW (Marked as LVDM22)

(TOP VIEW)

SN65LVDS22

SN65LVDM22

SLLS315C – DECEMBER 1998 – REVISED JUNE 2002

DUAL MULTIPLEXED LVDS REPEATERS

•

Meets or Exceeds the Requirements of ANSI

TIA/EIA-644-1995 Standard

•

Designed for Clock Rates up to 200 MHz

(400 Mbps)

•

Designed for Data Rates up to 250 Mbps

•

Pin Compatible With SN65LVDS122 and

SN65LVDT122, 1.5 Gbps 2x2 Crosspoint

Switch From TI

•

ESD Protection Exceeds 12 kV on Bus Pins

•

Operates From a Single 3.3-V Supply

•

Low-Voltage Differential Signaling With

Output Voltages of 350 mV Into:

– 100-

Ω Load (SN65LVDS22)

– 50-

Ω Load (SN65LVDM22)

•

Propagation Delay Time; 4 ns Typ

•

Power Dissipation at 400 Mbps of 150 mW

•

Bus Pins Are High Impedance When Disabled

•

LVTTL Levels Are 5 V Tolerant

•

Open-Circuit Fail Safe Receiver

The SN65LVDS22 and SN65LVDM22 are differential

line drivers and receivers that use low-voltage

differential signaling (LVDS) to achieve signaling

rates as high as 400 Mbps. The receiver outputs can

be switched to either or both drivers through the

multiplexer control signals S0 and S1. This allows the

flexibility to perform splitter or signal routing functions

with a single device.

The

TIA/EIA-644

standard

compliant

electrical

interface provides a minimum differential output

voltage magnitude of 247 mV into a 100-

Ω load and

receipt of 100 mV signals with up to 1 V of ground

potential

difference

between

a

transmitter

and

receiver. The SN65LVDM22 doubles the output drive

current to achieve LVDS levels with a 50-

Ω load.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 1998–2002, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.