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MT93L04 Datasheet(PDF) 8 Page - Zarlink Semiconductor Inc |
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MT93L04 Datasheet(HTML) 8 Page - Zarlink Semiconductor Inc |
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8 / 56 page  MT93L04 Data Sheet 8 Zarlink Semiconductor Inc. Sg1_d1 ICO E4 Internal Connection. Connected to VSS for normal operation DT1_d1 NC F3 No connection. The pin must be left open for normal operation. MCLK_d1 User Signal E2 Master Clock (Input). Nominal 10 MHz or 20 MHz Master Clock input. May be connected to an asynchronous (relative to frame signal) clock source. Fsel_d1 User Signal D1 Frequency select (Input). This input selects the Master Clock frequency operation. When Fsel pin is low, nominal 19.2 MHz Master Clock input must be applied. When Fsel pin is high, nominal 9.6 MHz Master Clock input must be applied. Halt_d1 ICO E1 Internal Connection. Connected to VSS for normal operation Step_d1 ICO F2 Internal Connection. Connected to VSS for normal operation PLLVSS1_d1 Power G3 PLL Ground. Must be connected to VSS PLLVDD_d1 Power F1 PLL Power Supply. Must be connected to VDD2 PLLVSS2_d1 Power G2 PLL Ground. Must be connected to VSS AT1_d1 NC G1 No connection. The pin must be left open for normal operation. DEVICE 2 TMS_d2 Signal V4 Test Mode Select (3.3 V Input). JTAG signal that controls the state transitions of the TAP controller. This pin is pulled high by an internal pull-up when not driven. TDI_d2 Signal Y2 Test Serial Data In (3.3 V Input). JTAG serial test instructions and data are shifted in on this pin. This pin is pulled high by an internal pull-up when not driven. TDO_d2 Signal W3 Test Serial Data Out (Output). JTAG serial data is output on this pin on the falling edge of TCK. This pin is held in high impedance state when JTAG scan is not enabled. TCK_d2 Signal Y3 Test Clock (3.3 V Input). Provides the clock to the JTAG test logic. TRSTB_d2 Signal W4 Test Reset (3.3 V Input). Asynchronously initializes the JTAG TAP controller by putting it in the Test-Logic-Reset state. This pin should be pulsed low on power-up or held low, to ensure that the MT93L00 is in the normal functional mode. This pin is pulled by an internal pull-down when not driven. Pin Description (continued) Signal Name Signal Type BGA Ball # Signal Description |
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Similar Description - MT93L04 |
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