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MT9196APR Datasheet(PDF) 2 Page - Zarlink Semiconductor Inc |
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MT9196APR Datasheet(HTML) 2 Page - Zarlink Semiconductor Inc |
2 / 46 page MT9196 Data Sheet 2 Zarlink Semiconductor Inc. Figure 2 - Pin Connections Pin Description Pin # Name Description 1M- Inverting Microphone (Input). Inverting input to microphone amplifier from the handset microphone. 2M+ Non-Inverting Microphone (Input). Non-inverting input to microphone amplifier from the handset microphone. 3VBias Bias Voltage (Output). (VDD/2) volts is available at this pin for biasing external amplifiers. Connect 0.1 µF capacitor to V SSA. 4VRef Reference voltage for codec (Output). Nominally [(VDD/2)-1.5] volts. Used internally. Connect 0.1 µF capacitor to V SSA. 5PWRST Power-up Reset (Input). CMOS compatible input with Schmitt Trigger (active low). 6IC Internal Connection. Tie externally to VSS for normal operation. 7VSSD Digital Ground. Nominally 0 volts. 8CS Chip Select (Input). This input signal is used to select the device for microport data transfers. Active low. TTL level compatible. 9SCLK Serial Port Synchronous Clock (Input). Data clock for microport. TTL level compatible. 10 DATA1 Bidirectional Serial Data. Port for microprocessor serial data transfer. In Motorola/National mode of operation, this pin becomes the data transmit pin only and data receive is performed on the DATA2 pin. TTL level compatible input levels. 11 DATA2 Serial Data Receive. In Motorola/National mode of operation, this pin is used for data receive to the IDPC. In Intel mode, serial data transmit and receive are performed on the DATA1 pin and DATA2 is disconnected. Input level TTL compatible. 12 WD Watchdog (Output). Watchdog timer output. Active high. 13 IRQ Interrupt Request (Open Drain Output). Low true interrupt output to microcontroller. AUXin MIC+ VDD HSPKR- HSPKR+ SPKR- SPKR+ VSS SPKR AUXout VSSA STB/F0i CLOCKin XSTAL2 Din M- M+ VBias VRef PWRST IC VSSD CS SCLK DATA1 DATA2 IRQ WD Dout 28 PIN PLCC 28 PIN SOIC/PDIP 1 6 5 43 2 7 8 9 10 11 23 19 20 21 22 24 25 26 27 28 PWRST IC VSSD CS SCLK DATA1 DATA2 VDD HSPKR- HSPKR+ SPKR- SPKR+ VSS SPKR AUXout 12 13 14 15 16 17 18 17 18 19 20 28 27 26 25 24 23 22 21 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 |
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