PDSP1601/PDSP1601A

7

SV3

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

SV2

0

0

0

0

1

1

1

1

0

0

0

0

1

1

1

1

SV1

0

0

1

1

0

0

1

1

0

0

1

1

0

0

1

1

SV0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Shift

No shift

1 place

2 places

3 places

4 places

5 places

6 places

7 places

8 places

9 places

10 places

11 places

12 places

13 places

14 places

15 places

(1)

Priority encode the 16 bit input to the Barrel Shifter and

place the 4 bit value in either of the R1 or R2 registers and

output the value on the SV port (if enabled by SVOE).

(2)

Shift the 16 bit input by the amount indicated by the

Priority Encoder such that the output from the Barrel Shifter is

a normalised value.

SV Input

If the SV port is selected as the source of the shift value,

then the input to the Barrel Shifter is shifted by the value stored

in the internal SV register.

SVOE

SVOE

SVOE

SVOE

SVOE

The SV port acts as an input or an output depending upon

the IS0-3 instruction. If the user does not wish to use the

normalise instructions, then the SV port mat be forced to be

input only by typing SVOE control high. In this mode the SV

port may be considered an extension of the instruction inputs.

R1 and R2 Registers

The R1 and R2 registers may be loaded from the Priority

Encoder (NRMR1 and NRMR2) or from the SV input (LR1SV,

LR2SV).

Whilst the latter two instructions are executing, the Barrel

Shifter will pass its input to the output unshifted.

Priority Encoder

If the priority encoder is selected as the source of the shift

value (instructions:- NRMXX, NRMR1, MRMRZ), then within

one 100ns cycle or two 50ns cycles for the PDSP1601A (one

200ns or two 100ns cycles for the PDSP1601), the shift

circuitry will:

Table 3 Barrel shifter codes

R1

MUX

R2

MUX

MUX

4

16

PRIORITY ENCODER

INSTRUCTION

DECODE

4

4

IS0-3

SV

SVOE

Fig.3 Shift control block