MC74HC245ADT datasheet(4/9 Pages) ONSEMI

Part #	MC74HC245ADT

Description	Octal 3?뭆tate Noninverting Bus Transceiver High?뭁erformance Silicon?묰ate CMOS

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Manufacturer	ONSEMI [ON Semiconductor]

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MC74HC245A

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4

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Symbol

Parameter

Test Conditions

VCC

V

–55 to

25

_C

v 85_C

v 125_C

Unit

VIH

Minimum High−Level Input Voltage

Vout = VCC – 0.1 V

|Iout| v 20 mA

2.0

3.0

4.5

6.0

1.5

2.1

3.15

4.2

1.5

2.1

3.15

4.2

1.5

2.1

3.15

4.2

V

VIL

Maximum Low−Level Input Voltage

Vout = 0.1 V

|Iout| v 20 mA

2.0

3.0

4.5

6.0

0.5

0.9

1.35

1.8

0.5

0.9

1.35

1.8

0.5

0.9

1.35

1.8

V

VOH

Minimum High−Level Output

Voltage

Vin = VIH

|Iout| v 20 mA

2.0

4.5

6.0

1.9

4.4

5.9

1.9

4.4

5.9

1.9

4.4

5.9

V

Vin = VIH |Iout| v 2.4 mA

|Iout| v 6.0 mA

|Iout| v 7.8 mA

3.0

4.5

6.0

2.48

3.98

5.48

2.34

3.84

5.34

2.2

3.7

5.2

VOL

Maximum Low−Level Output

Voltage

Vin = VIL

|Iout| v 20 mA

2.0

4.5

6.0

0.1

V

Vin = VIL |Iout| v 2.4 mA

|Iout| v 6.0 mA

|Iout| v 7.8 mA

3.0

4.5

6.0

0.26

0.33

0.4

Iin

Maximum Input Leakage Current

Vin = VCC or GND

6.0

± 0.1

± 1.0

mA

IOZ

Maximum Three−State Leakage

Current

Output in High−Impedance State

Vin = VIL or VIH

Vout = VCC or GND

6.0

± 0.5

± 5.0

± 10

mA

ICC

Maximum Quiescent Supply Cur-

rent (per Package)

Vin = VCC or GND

Iout = 0 mA

6.0

4.0

40

160

mA

7. Information on typical parametric values and high frequency or heavy load considerations can be found in the ON Semiconductor

High−Speed CMOS Data Book (DL129/D).

AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)

Symbol

Parameter

VCC

V

Guaranteed Limit

Unit

–55 to

25

_C

v 85_C

v 125_C

tPLH,

tPHL

Maximum Propagation Delay,

A to B, B to A

(Figures 1 and 3)

2.0

3.0

4.5

6.0

75

55

15

13

95

70

19

16

110

80

22

19

ns

tPLZ,

tPHZ

Maximum Propagation Delay,

Direction or Output Enable to A or B

(Figures 2 and 4)

2.0

3.0

4.5

6.0

110

90

22

19

140

110

28

24

165

130

33

28

ns

tPZL,

tPZH

Maximum Propagation Delay,

Output Enable to A or B

(Figures 2 and 4)

2.0

3.0

4.5

6.0

110

90

22

19

140

110

28

24

165

130

33

28

ns

tTLH,

tTHL

Maximum Output Transition Time,

Any Output

(Figures 1 and 3)

2.0

3.0

4.5

6.0

60

23

12

10

75

27

15

13

90

32

18

15

ns

Cin

Maximum Input Capacitance (Pin 1 or Pin 19)

−

10

pF

Cout

Maximum Three−State I/O Capacitance

(I/O in High−Impedance State)

−

15

pF

8. For propagation delays with loads other than 50 pF, and information on typical parametric values, see the ON Semiconductor High−Speed

CMOS Data Book (DL129/D).

CPD

Power Dissipation Capacitance (Per Transceiver Channel) (Note 9)

Typical @ 25

°C, VCC = 5.0 V

pF

40

9. Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see the ON

Semiconductor High−Speed CMOS Data Book (DL129/D).

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