MC74HC374A

http://onsemi.com

4

Unit

Guaranteed Limit

V

Test Conditions

Parameter

Symbol

Unit

v 125_C

v 85_C

– 55 to

25

_C

V

Test Conditions

Parameter

Symbol

Maximum Input Leakage Current

6.0

± 0.1

± 1.0

± 1.0

mA

Maximum Three−State

Leakage Current

Output in High−Impedance State

6.0

± 0.5

± 5.0

± 10

mA

Maximum Quiescent Supply

Current (per Package)

6.0

4

40

160

mA

NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book

(DL129/D).

Symbol

Parameter

V

Guaranteed Limit

Unit

– 55 to

25

_C

v 85_C

v 125_C

Maximum Clock Frequency (50% Duty Cycle)

2.0

3.0

4.5

6.0

6

15

30

35

5

10

24

28

4

8

20

24

MHz

Maximum Propagation Delay, Input Clock to Q

(Figures 1 and 5)

2.0

3.0

4.5

6.0

125

80

25

21

155

110

31

26

190

130

38

32

ns

Maximum Propagation Delay, Output Enable to Q

(Figures 3 and 6)

2.0

3.0

4.5

6.0

150

100

30

26

190

125

38

33

225

150

45

38

ns

Maximum Propagation Delay, Output Enable to Q

(Figures 3 and 6)

2.0

3.0

4.5

6.0

150

100

30

26

190

125

38

33

225

150

45

38

ns

Maximum Output Transition Time, Any Output

(Figures 1 and 5)

2.0

3.0

4.5

6.0

75

27

15

13

95

32

19

16

110

36

22

19

ns

Maximum Input Capacitance

10

10

10

pF

Maximum Three−State Output Capacitance

(Output in High−Impedance State)

15

15

15

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON

Semiconductor High−Speed CMOS Data Book (DL129/D).

Power Dissipation Capacitance (Per Enabled Output)*

Typical @ 25

pF

34

ON Semiconductor High−Speed CMOS Data Book (DL129/D).