DMOS Full-Bridge Motor Driver

A3950

11

Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

EU Package, 16 Pin QFN with Exposed Thermal Pad

3.8

NOM

.150

0.15R

REF

.006

3.8

NOM

.150

0.35

NOM

.014

0.65

NOM

.026

1.15

NOM

.045

4X0.20

MIN

.008

12X0.20

MIN

.008

A

B

0.80

0.70

.031

.028

0.05

0.00

.002

.000

0.20

REF

.008

C

SEATING

PLANE

C

0.08 [.003]

16X

16X

0.10 [.004] M C A B

0.05 [.002] M C

0.35

0.25

.014

.010

0.65

0.45

.026

.018

4.15

3.85

.163

.152

4.15

3.85

.163

.152

0.65 .026

16

16

2

1

1

2

16

2

1

A

A Terminal #1 mark area

B Exposed thermal pad (reference only, terminal #1

identifier appearance at supplier discretion)

All dimensions reference only, not for tooling use.

(reference JEDEC MO-220WGGC-4)

Dimensions in millimeters

U.S. Customary dimensions (in.) in brackets, for reference only

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

C

C

Reference land pattern layout (reference IPC7351

QFN65P400X400X80-17BM); adjust as necessary to meet

application process requirements and PCB layout

tolerances; when mounting on a multilayer PCB, thermal

vias at the exposed thermal pad land can improve thermal

dissipation (reference EIA/JEDEC Standard JESD51-5)

2.15

NOM

.085

2.15

NOM

.085

2.15

NOM

.085

2.15

NOM

.085

B

4X 0.20

MIN

.008